![](http://datasheet.mmic.net.cn/200000/ITT3107BD_datasheet_15070238/ITT3107BD_2.png)
4.8V 3.0W RF Power Amplifier IC for GSM
ITT3107BD
PRELIMINARY
Preliminary Data - Specifications Subject to Change Without Notice
901788 D, February 1999
GaAsTEK
5310 Valley Park Drive
Roanoke, VA 24019 USA
www.gaastek.com
Tel:
1-540-563-3949
1-888-563-3949 (USA)
Fax: 1-540-563-8616
2
APPLICATION INFORMATION
C6
VCTL(VGG)
RF IN
C1
RF OUT
L1
T1
C5
C7
R1
L2
C4
60mil GETEK Board
VBAT
VTXE
C3
T2
T3
C2
L3
1
2
3
5
6
8
16
9
11
12
14
15
7
10
4
13
Q1
2,3,6,7
4
1,5,8
R2
Figure 1. Evaluation Board Schematic
List of components:
C1 = 9.1 pF DLI multilayer ceramic chip capacitor (C11AH9R1B5TXL)
C2 = 100 pF DLI multilayer ceramic chip capacitor (C11AH101K5TXL)
C3 = C7 = 4700 pF Kemet multilayer ceramic chip capacitor (C0805C472K5RAC)
C4 = C6 = 0.1 F Kemet multilayer ceramic chip capacitor (C1206C104K5RAC)
C5 = 1.5 pF DLI multilayer ceramic chip capacitor (C11AH1R5B5TXL)
L1 = L2 = 39 nH Coilcraft chip inductor (1008CS.390XMBB)
L3 = 6.8 nH Coilcraft chip inductor (0805CS.060XMBB)
R1 = 10
Chip Resistor
R2 = 300
Chip Resistor
T1 = 0.13" of 50
grounded coplanar waveguide (60 mil GETEK board)
T2 = 0.14" of 50
grounded coplanar waveguide (60 mil GETEK board)
T3 = 0.14" of 50
grounded coplanar waveguide (60 mil GETEK board)
Q1 = PMOSFET Switch (Siliconix Si6433DQ)
Component layout and printed circuit board drawing for RF IC evaluation board are shown in Figure 9.
Biasing: Gate bias voltage (VGG) must be applied prior to RF input power and drain bias voltage (VTXE=0). Reverse the sequence
when turning the part off — remove the RF input and disable drain bias (VTXE=VBAT) before removing gate bias.
Q1 ON:
VTXE = GND
Q1 OFF:
VTXE = VBAT