參數(shù)資料
型號： ISPPAC-CLK5610V-01T100I
廠商： Lattice Semiconductor Corporation
英文描述： Linear Array Light; LED Color:Blue; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:1.6A; Supply Voltage:24VDC; Wavelength:470nm
中文描述： 在系統(tǒng)可編程，零延遲時鐘發(fā)生器通用扇出緩沖器
文件頁數(shù)： 11/47頁
文件大?。?/td> 871K
代理商： ISPPAC-CLK5610V-01T100I
Lattice Semiconductor
ispClock5600 Family Data Sheet
11
Timing Speci
fi
cations
Skew Matching
Programmable Skew Control
Control Functions
Figure 6. RESET and Profile Select Timing
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
t
SKEW
Output-output Skew
Between any two identically con
fi
gured and loaded
outputs regardless of bank.
—
—
50
ps
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
t
SKRANGE
Skew Control Range
1
Fine Skew Mode, f
VCO
= 320 MHz
Fine Skew Mode, f
VCO
= 640 MHz
Coarse Skew Mode, f
VCO
= 320 MHz
Coarse Skew Mode, f
VCO
= 640 MHz
—
5.86
—
ns
—
2.93
—
—
11.72
—
—
5.86
—
SK
STEPS
Skew Steps per range
—
16
—
t
SKSTEP
Skew Step Size
2
Fine Skew Mode, f
VCO
= 320 MHz
Fine Skew Mode, f
VCO
= 640 MHz
Coarse Skew Mode, f
VCO
= 320 MHz
Coarse Skew Mode, f
VCO
= 640 MHz
Fine skew mode
—
390
—
ps
—
195
—
—
780
—
—
390
—
t
SKERR
Skew Time Error
3
—
30
—
ps
Coarse skew mode
—
50
—
1. Skew control range is a function of VCO frequency (f
VCO
). In
fi
ne skew mode T
SKRANGE
= 15/(8 x f
VCO
).
In coarse skew mode T
SKRANGE
= 15/(4 x f
VCO
).
2. Skew step size is a function of VCO frequency (f
VCO
). In
fi
ne skew mode T
SKSTEP
= 1/(8 x f
VCO
).
In coarse skew mode T
SKSTEP
= 1/(4 x f
VCO
).
3. Only applicable to outputs with non-zero skew settings.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
t
DIS/OE
Delay Time, OEX or OEY to Output Disabled/
Enabled
—
10
20
ns
t
DIS/GOE
Delay Time, GOE to Output Disabled/Enabled
—
10
20
ns
t
SUSGATE
Setup Time, SGATE to Output Clock Start/
Stop
PLL Reset Pulse Width
2
Logic Reset Pulse Width
3
3
—
—
cycles
1
t
PLL_RSTW
t
RSTW
t
HPS_RST
1. Output clock cycles for the particular output being controlled.
2. Will completely reset PLL.
3. Will only reset digital logic.
1
—
—
ms
20
—
—
ns
Hold time for RESET past change in PS[0..1]
20
—
—
ns
t
HPS_RST
t
PLL_RSTW
PS[0..1]
RESET
相關(guān)PDF資料
PDF描述
ISPCLOCK5600 In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5610V-01T100C In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5620V-01T100C LED Area Light; LED Color:Blue; Leaded Process Compatible:No; Light Emitting Area:80x80mm; Peak Reflow Compatible (260 C):No; Supply Current:250mA; Supply Voltage:24VDC; Wavelength:470nm
ISPPAC-CLK5620V-01T100I In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5610V-01T48C Spot Light; LED Color:Blue; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:160mA; Supply Voltage:30VDC; Wavelength:470nm
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISPPAC-CLK5610V-01T48C 功能描述:時鐘驅(qū)動器及分配 3.3V 10-320MHz RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
ISPPAC-CLK5610V-01T48I 功能描述:時鐘驅(qū)動器及分配 PROGRAMMABLE ZERO DELAY CL GEN RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
ISPPAC-CLK5610V-01TN100C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5610V-01TN100I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5610V-01TN48C 功能描述:時鐘驅(qū)動器及分配 PROGRAMMABLE ZERO DELAY CL GEN RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
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