參數(shù)資料
型號(hào): ISP1181BBS
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Full-speed Universal Serial Bus peripheral controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC48
封裝: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-619-2, HVQFN-48
文件頁(yè)數(shù): 62/70頁(yè)
文件大?。?/td> 341K
代理商: ISP1181BBS
Philips Semiconductors
ISP1181B
Full-speed USB peripheral controller
Product data
Rev. 02 — 07 December 2004
62 of 70
9397 750 13958
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
22.2.4
Using H8S/2357 I/O Ports
In the interface circuit of
Figure 31
pin P1.1 of the H8S/2357 is configured as a
general purpose output port. This pin drives the ISP1181B’s WAKEUP input to
generate a remote wake-up.
The H8S/2357 has 3 registers to configure port 1: Port 1 Data Direction Register
(P1DDR), Port 1 Data Register (P1DR) and Port 1 Register (PORT1). Only registers
P1DDR and P1DR must be configured, register PORT1 is only used to read the
actual levels on the port pins.
H8S/2357:
select pin P1.1 to be an output in register P1DDR
program the desired bit value for P1.1 in register P1DR.
23. Test information
The dynamic characteristics of the analog I/O ports (D
+
and D
)
as listed in
Table 56
,
were determined using the circuit shown in
Figure 33
.
Load capacitance:
C
L
= 50 pF (full-speed mode)
Speed:
full-speed mode only: internal 1.5 k
pull-up resistor on D
+
Fig 33. Load impedance for D
+
and D
pins.
test point
CL
50 pF
22
15 k
D.U.T
MGS784
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