參數(shù)資料
型號： ISP1181ADGG
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Full-speed Universal Serial Bus peripheral controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PDSO48
封裝： 6.10 MM, PLASTIC, MO-153, SOT-362-1, TSSOP-48
文件頁數(shù)： 6/70頁
文件大?。?/td> 341K
代理商： ISP1181ADGG
Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
Product data
Rev. 05 — 08 December 2004
6 of 70
9397 750 13959
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
EOT
10
5
I
End-Of-Transfer input (programmable
polarity, see
Table 21
); used by the DMA
controller to force the end of a DMA transfer
to the ISP1181A
DMA request output (4 mA; programmable
polarity, see
Table 21
); signals to the DMA
controller that the ISP1181A wants to start
a DMA transfer
DMA acknowledge input (programmable
polarity, see
Table 21
); used by the DMA
controller to signal the start of a DMA
transfer requested by the ISP1181A
test input; this pin must be connected to
V
CC
via an external 10 k
resistor
test input; this pin must be connected to
V
CC
via an external 10 k
resistor
interrupt output; programmable polarity
(active HIGH or LOW) and signalling (level
or pulse); see
Table 21
test output; this pin is used for test
purposes only
bus configuration selector; see
Table 3
bus configuration selector; see
Table 3
bit 15 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 14 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 13 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 12 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 11 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 10 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
ground supply
I/O pin reference voltage (3.3 V); no
connection if V
CC
= 5.0 V
bit 9 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 8 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 7 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 6 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
DREQ
11
6
O
DACK
12
7
I
TEST1
13
8
I
TEST2
14
9
I
INT
15
10
O
TEST3
16
11
O
BUS_CONF0
BUS_CONF1
DATA15
17
18
19
12
13
14
I
I
I/O
DATA14
20
15
I/O
DATA13
21
16
I/O
DATA12
22
17
I/O
DATA11
23
18
I/O
DATA10
24
19
I/O
GND
V
ref
25
26
20
21
-
-
DATA9
27
22
I/O
DATA8
28
23
I/O
DATA7
29
24
I/O
DATA6
30
25
I/O
Table 2:
Symbol
[1]
Pin description
…continued
Pin
TSSOP48
Type
Description
HVQFN48
相關(guān)PDF資料
PDF描述
ISP1181B Full-speed Universal Serial Bus peripheral controller
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ISP1181BDGG Full-speed Universal Serial Bus peripheral controller
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1181ADGG,112 功能描述:USB 接口集成電路 USB 1.1 ADVANCED DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1181ADGG,118 功能描述:USB 接口集成電路 USB 1.1 ADV. DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1181ADGGTM 功能描述:IC USB HOST CTRL FLL-SPD 48TSSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1181B 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller
ISP1181BBS 制造商:NXP Semiconductors 功能描述:IC CONTROLLER USB PERIPHERAL SMD 制造商:ST-Ericsson 功能描述:CONTROLLER USB PERIPHERAL 48HVQFN
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