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參數(shù)資料
| 型號： | ISP1181ADGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Full-speed Universal Serial Bus peripheral controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, MO-153, SOT-362-1, TSSOP-48 |
| 文件頁數(shù)： | 42/70頁 |
| 文件大小： | 341K |
| 代理商： | ISP1181ADGG |
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Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
Product data
Rev. 05 — 08 December 2004
42 of 70
9397 750 13959
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Bits RESET, RESUME, EOT and SOF are cleared upon reading the Interrupt
Register. The endpoint bits (EP0OUT to EP14) are cleared by reading the associated
Endpoint Status Register.
Bit BUSTATUS follows the USB bus status exactly, allowing the firmware to get the
current bus status when reading the Interrupt Register.
SETUP and OUT token interrupts are generated after ISP1181A has acknowledged
the associated data packet. In bulk transfer mode, the ISP1181A will issue interrupts
for every ACK received for an OUT token or transmitted for an IN token.
In isochronous mode, an interrupt is issued upon each packet transaction. The
firmware must take care of timing synchronization with the host. This can be done via
the Pseudo Start-Of-Frame (PSOF) interrupt, enabled via bit IEPSOF in the Interrupt
Enable Register. If a Start-Of-Frame is lost, PSOF interrupts are generated every
1 ms. This allows the firmware to keep data transfer synchronized with the host. After
3 missed SOF events the ISP1181A will enter ‘suspend’ state.
An alternative way of handling isochronous data transfer is to enable both the SOF
and the PSOF interrupts and disable the interrupt for each isochronous endpoint.
Fig 8.
Interrupt logic.
MGS772
RESET
SUSPND
RESUME
SOF
EP14
...
EP0IN
.
.
.
.
EP0OUT
EOT
IERST
interrupt register
interrupt enable
register
IESUSP
IERESM
IESOF
IEP14
...
IEP0IN
IEP0OUT
IEEOT
device mode
register
INTENA
INTLVL
hardware configuration
register
INTPOL
PULSE
GENERATOR
INT
1
0
相關PDF資料 |
PDF描述 |
|---|---|
| ISP1181B | Full-speed Universal Serial Bus peripheral controller |
| ISP1181BBS | Full-speed Universal Serial Bus peripheral controller |
| ISP1181BDGG | Full-speed Universal Serial Bus peripheral controller |
| ISP1181 | Full-speed Universal Serial Bus Interface Device(全速通用串行總線接口器件) |
| ISP1181DGG | INDUCTOR 4.7NH +-.3NH 0402 SMD |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1181ADGG,112 | 功能描述:USB 接口集成電路 USB 1.1 ADVANCED DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1181ADGG,118 | 功能描述:USB 接口集成電路 USB 1.1 ADV. DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1181ADGGTM | 功能描述:IC USB HOST CTRL FLL-SPD 48TSSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1181B | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller |
| ISP1181BBS | 制造商:NXP Semiconductors 功能描述:IC CONTROLLER USB PERIPHERAL SMD 制造商:ST-Ericsson 功能描述:CONTROLLER USB PERIPHERAL 48HVQFN |
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