www.irf.com
1
08/05/05
IRF6662
Power MOSFET
d
Typical values (unless otherwise specified)
V
DSS
V
GS
100V max ±20V max 17.5m
@ 10V
Q
g tot
Q
gd
22nC
6.8nC
DirectFET
ISOMETRIC
MZ
PD - 97039
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
c
SQ
SX
ST
Fig 1.
Typical On-Resistance vs. Gate Voltage
Description
The IRF6662 combines the latest HEXFET Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to achieve the
lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with
existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques,
when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided
cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6662 is optimized for primary side bridge topologies in isolated DC-DC applications, for wide range universal input Telecom applications
(36V - 75V), and for secondary side synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device coupled
with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements,
and makes this device ideal for high performance isolated DC-DC converters.
z
Lead and Bromide Free
c
z
Low Profile (<0.7 mm)
z
Dual Sided Cooling Compatible
c
z
Ultra Low Package Inductance
z
Optimized for High Frequency Switching
c
z
Ideal for High Performance Isolated Converter
Primary Switch Socket
z
Optimized for Synchronous Rectification
z
Low Conduction Losses
z
Compatible with existing Surface Mount Techniques
c
c
Click on this section to link to the appropriate technical paper.
d
Click on this section to link to the DirectFET Website.
e
Surface mounted on 1 in. square Cu board, steady state.
f
T
C
measured with thermocouple mounted to top (Drain) of part.
g
Repetitive rating; pulse width limited by max. junction temperature.
h
Starting T
J
= 25°C, L = 3.2mH, R
G
= 25
, I
AS
= 4.9A.
Notes:
MQ
MX
MT
MZ
Absolute Maximum Ratings
Parameter
Units
V
V
DS
V
GS
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
D
@ T
C
= 25°C
I
DM
E
AS
I
AR
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
@ 10V
e
Continuous Drain Current, V
GS
@ 10V
e
Continuous Drain Current, V
GS
@ 10V
f
Pulsed Drain Current
g
Single Pulse Avalanche Energy
h
Avalanche Current
g
A
mJ
A
39
4.9
Max.
100
6.6
47
66
±20
8.3
R
DS(on)
V
gs(th)
3.9V
0
5
10
15
20
25
QG Total Gate Charge (nC)
Fig 2.
Typical Total Gate Charge vs.
Gate-to-Source Voltage
0.0
2.0
4.0
6.0
8.0
10.0
12.0
VG
VDS= 80V
VDS= 50V
VDS= 20V
ID= 4.9A
4
6
8
10
12
14
16
VGS, Gate -to -Source Voltage (V)
0
20
40
60
80
100
TS
)
ID = 4.9A
TJ = 25°C
TJ = 125°C