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參數(shù)資料
| 型號： | IDT79RC32V332-100DPI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 100 MHz, RISC MICROCONTROLLER, PQFP208 |
| 封裝： | 28 X 28 MM, 3.40 MM HEIGHT, PLASTIC, QFP-208 |
| 文件頁數(shù)： | 24/27頁 |
| 文件大?。?/td> | 246K |
| 代理商： | IDT79RC32V332-100DPI |
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6 of 27
September 14, 2001
79RC32332
mem_245_oe_n
Output
Low
Memory FCT245 Output Enable Negated
Controls output enable to optional FCT245 transceiver bank by asserting during both reads and writes to a
memory or I/O bank.
mem_245_dt_r_n
Output
High
Memory FCT245 Direction Xmit/Rcv Negated Recommend an external pull-up.
Alternate function: cpu_dt_r_n. See CPU Core Specific Signals below.
output_clk
Output
High
Output Clock
Optional clock output.
PCI Interface
pci_ad[31:0]
I/O
PCI
PCI Multiplexed Address/Data Bus
Address driven by Bus Master during initial frame_n assertion, and then the Data is driven by the Bus Master
during writes; or the Data is driven by the Bus Slave during reads.
pci_cbe_n[3:0]
I/O
PCI
PCI Multiplexed Command/Byte Enable Bus
Command (not negated) Bus driven by the Bus Master during the initial frame_n assertion. Byte Enable
Negated Bus driven by the Bus Master during the data phase(s).
pci_par
I/O
PCI
PCI Parity
Even parity of the pci_ad[31:0] bus. Driven by Bus Master during Address and Write Data phases. Driven by
the Bus Slave during the Read Data phase.
pci_frame_n
I/O
PCI
PCI Frame Negated
Driven by the Bus Master. Assertion indicates the beginning of a bus transaction. De-assertion indicates the
last datum.
pci_trdy_n
I/O
PCI
PCI Target Ready Negated
Driven by the Bus Slave to indicate the current datum can complete.
pci_irdy_n
I/O
PCI
PCI Initiator Ready Negated
Driven by the Bus Master to indicate that the current datum can complete.
pci_stop_n
I/O
PCI
PCI Stop Negated
Driven by the Bus Slave to terminate the current bus transaction.
pci_idsel_n
Input
—
PCI Initialization Device Select
Uses pci_req_n[2] pin. See the PCI subsection.
pci_perr_n
I/O
PCI
PCI Parity Error Negated
Driven by the receiving Bus Agent 2 clocks after the data is received, if a parity error occurs.
pci_serr_n
I/O
Open-
collector
PCI
System Error Requires an external pull-up.
Driven by any agent to indicate an address parity error, data parity during a Special Cycle command, or any
other system error.
pci_clk
Input
—
PCI Clock
Clock for PCI Bus transactions. Uses the rising edge for all timing references.
pci_rst_n
Input
—
PCI Reset Negated
Host mode: Resets all PCI related logic.
Satellite mode: with boot from PCI mode: Resets all PCI related logic and also warm resets the 32332.
pci_devsel_n
I/O
PCI
PCI Device Select Negated
Driven by the target to indicate that the target has decoded the present address as a target address.
pci_req_n[2]
Input
—
PCI Bus Request #2 Negated Requires an external pull-up.
Host mode: pci_req_n[2] is an input indicating a request from an external device.
Satellite mode: used as pci_idsel pin which selects this device during a configuration read or write.
Alternate function: pci_idsel (satellite).
Name
Type
Drive
Strength
Capability
Description
Table 1 Pin Descriptions (Part 2 of 6)
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| IDT79RC32V332-133DH | 功能描述:IC PROC 32BIT CPU 133MHZ 208-QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Interprise™ 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點(diǎn):- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| IDT79RC32V332-133DHG | 功能描述:IC PROC 32BIT CPU 133MHZ 208-QFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Interprise™ 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點(diǎn):- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| IDT79RC32V332-133DHGI | 制造商:Integrated Device Technology Inc 功能描述:IC PROC 32BIT CPU 133MHZ 208-QFP |
| IDT79RC32V332-133DHI | 功能描述:IC PROC 32BIT CPU 133MHZ 208-QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Interprise™ 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點(diǎn):- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| IDT79RC32V332-150DH | 功能描述:IC PROC 32BIT CPU 150MHZ 208-QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Interprise™ 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點(diǎn):- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
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