參數(shù)資料
型號: HY27US081G1MTCS
廠商: HYNIX SEMICONDUCTOR INC
元件分類: PROM
英文描述: 128M X 8 FLASH 2.7V PROM, 45 ns, PDSO48
封裝: 12 X 20 MM, 1.20 MM HEIGHT, TSOP1-48
文件頁數(shù): 11/39頁
文件大?。?/td> 312K
代理商: HY27US081G1MTCS
Rev 0.2 / May. 2007
19
Preliminary
HY27US(08/16)1G1M Series
1Gbit (128Mx8bit / 64Mx16bit) NAND Flash
Parameter
Symbol
3.3Volt
Unit
Min
Max
CLE Setup time
tCLS
0ns
CLE Hold time
tCLH
10
ns
CE setup time
tCS
0ns
CE hold time
tCH
10
ns
WE pulse width
tWP
25(1)
ns
ALE setup time
tALS
0ns
ALE hold time
tALH
10
ns
Data setup time
tDS
20
ns
Data hold time
tDH
10
ns
Write Cycle time
tWC
50
ns
WE High hold time
tWH
15
ns
Data Transfer from Cell to register
tR
15
us
ALE to RE Delay
tAR
10
ns
CLE to RE Delay
tCLR
10
ns
Ready to RE Low
tRR
20
ns
RE Pulse Width
tRP
25
ns
WE High to Busy
tWB
100
ns
Read Cycle Time
tRC
50
ns
RE Access Time
tREA
30
ns
RE High to Output High Z
tRHZ
30
ns
CE High to Output High Z
tCHZ
20
ns
RE or CE high to Output hold
tOH
10
ns
RE High Hold Time
tREH
15
ns
Output High Z to RE low
tIR
0ns
CE Access Time
tCEA
45
ns
WE High to RE low
tWHR
60
ns
Last RE High to busy (at sequential read)
tRB
100
ns
CE High to Ready (in case of interception by CE at read)
tCRY
60+tr(R/B#)(4)
ns
CE High Hold Time (at the last serial read)(3)
tCEH
100
ns
Device Resetting Time (Read / Program / Erase)
tRST
5/10/500(2)
us
Write Protection time
tWW(5)
100
ns
Table 12: AC Timing Characteristics
NOTE:
1. If tCS is less than 10ns tWP must be minimum 35ns, otherwise, tWP may be minimum 25ns.
2. If Reset Command (FFh) is written at Ready state, the device goes into Busy for maximum 5us
3. To break the sequential read cycle, CE must be held for longer time than tCEH.
4. The time to Ready depends on the value of the pull-up resistor tied R/B# pin.ting time.
5. Program / Erase Enable Operation : WP high to WE High.
Program / Erase Disable Operation : WP Low to WE High.
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