參數(shù)資料
型號: HV7131D-COF
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 模擬信號調(diào)理
英文描述: CMOS IMAGE SENSOR With 8-bit ADC
中文描述: SPECIALTY ANALOG CIRCUIT, DSS24
封裝: COF-24
文件頁數(shù): 46/61頁
文件大?。?/td> 2621K
代理商: HV7131D-COF
HV7131GP
2004/10/29 V2.4 46
Final Video Output Size
640x480
.
.
If Integration Time < Core Frame Time, Real Frame Time is
2 * (208 + 640) SCPs + 480 * (208 + 640) SCPs + 8 * (208 + 640) SCPs = 415520 SCPs =
0.041552sec
else Real Frame Time is
Integration Time * SCPs + 8 * (208 + 640) SCPs.
HOLD SLOT in frame timing appears only if integration time is larger than core frame time.
IDLE SLOT(2LCPs + (512+HBLANK)*4)
LCP(848 SCPs)
HBLANK
(208 SCPs)
HSYNC (640 SCPs)
Active Data: 640 EA
VBLANK[VSYNC]
(8 LCPs)
HOLD SLOT
(Integration Time – Core Frame Time)
Real Frame
Time
Core Frame
Time
Video Lines is
active every
LCP, that is,
480 Video Lines
for 480 LCPs
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