參數(shù)資料
型號: HV7131D-COF
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 模擬信號調(diào)理
英文描述: CMOS IMAGE SENSOR With 8-bit ADC
中文描述: SPECIALTY ANALOG CIRCUIT, DSS24
封裝: COF-24
文件頁數(shù): 24/61頁
文件大?。?/td> 2621K
代理商: HV7131D-COF
HV7131GP
2004/10/29 V2.4 24
exposure control. Programmable range is same as preamp gain. Recommended value is 16.5X.
Preamp Gain Normal [PRENOR : 1ah : 10h]
7
6
5
4
3
2
1
0
Preamp Gain Normal
0
0
0
1
0
0
0
0
Preamp Gain Normal is reference value of preamp gain when sensor adjusts preamp gain for auto
exposure control. First, sensor controls integration time before adjusting preamp gain for auto exposure
control. After integration time is changed to the minimum or maximum value, sensor adjusts preamp
gain from this register value. Refer to figure of AE mode1 register(60H).
Programmable range is same as preamp gain. Recommended value is 1.5X.
ASP Bias [ASPBIAS : 1bh : 13h]
7
6
5
4
3
2
1
0
reserved
Pixel Bias
Amp Bias
0
0
0
1
0
0
1
1
Pixel Bias
controls the amount of current in internal pixel bias circuit to amplify pixel
output effectively. The larger register value increases the amount of
current.
Amplifier Bias
controls the amount of current in internal amplifier bias circuit to amplify
pixel output effectively. The larger register value increases the amount of
current.
Reset Level Clamp [RSTCLMP : 1ch : 07h]
7
6
5
4
3
2
1
0
Reserved
Reset Level Clamp
0
0
0
0
0
1
1
1
Because extremely bright image like sun affects reset data voltage of pixel to lower, bright image is
captured as black image in image sensor regardless of correlated double sampling. To solve this
extraordinary phenomenon, we adopt the method to clamp reset data voltage. Reset Level Clamp
controls the reset data voltage to prevent inversion of extremely bright image. The larger register value
clamps the reset data level at highest voltage level. Default value is 7 to clamp the reset data level at
appropriate voltage level.
ADC Bias [ADCBIAS : 20h : 0fh]
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