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參數(shù)資料
| 型號： | HN58V1001 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 1M EEPROM (128-kword ×8-bit)(1M EEPROM (128k字 ×8位)) |
| 中文描述： | 100萬的EEPROM（128 KWord的× 8位）（1米的EEPROM（128K的字× 8位）） |
| 文件頁數(shù)： | 24/24頁 |
| 文件大小： | 181K |
| 代理商： | HN58V1001 |
HN58V1001 Series
24
Revision Record
(cont.)
Rev.
Date
Contents of Modification
Drawn by
Approved by
4.0
Nov.25, 1994
Capacitance
Addition of note: 1
AC Characteristics
Write cycle: Addition of note 2,3
Addition of t
min: 250 ns
Page write timing waveform
Addition of note: 1
M. Terasawa
T. Muto
5.0
May. 23, 1995 Deletion of HN58V1001R series (TFP-32DAR)
M. Terasawa
T. Muto
6.0
Apr. 30, 1997 Change of format
AC Characteristics
Addition of note.7
Timing Waveforms
Toggle bit
Addition of note.3, 4
Functional Description
Addition of CPU Reset timing waveform
Data protection 3: Addition of note
Package Dimensions
Change of FP-32D, TFP-32DA
Y. Nagai
K. Furusawa
7.0
Oct. 31, 1997 Timing Waveforms
Read Timing Waveform: Correct error
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HN58V256AI | 256 k EEPROM (32-kword ×8-bit)(256k EEPROM (32k字 ×8位)) |
| HN58V256A | 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A) |
| HN58V256AFP-12 | 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A) |
| HN58V256AT-12 | 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A) |
| HN58V257AT-12 | 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HN58V1001FP-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| HN58V1001FP-25 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function |
| HN58V1001FP-25E | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:1M EEPROM (128-kword ?? 8-bit) Ready/Busy and RES function |
| HN58V1001P-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| HN58V1001P-25 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function |
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