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參數(shù)資料
| 型號： | HN58V1001 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 1M EEPROM (128-kword ×8-bit)(1M EEPROM (128k字 ×8位)) |
| 中文描述： | 100萬的EEPROM（128 KWord的× 8位）（1米的EEPROM（128K的字× 8位）） |
| 文件頁數(shù)： | 15/24頁 |
| 文件大小： | 181K |
| 代理商： | HN58V1001 |
HN58V1001 Series
15
Functional Description
Automatic Page Write
Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write
cycle. Following the initial byte cycle, an additional 1 to 127 bytes can be written in the same manner.
Each additional byte load cycle must be started within 30
μ
s from the preceding falling edge of
WE
or
CE
.
When
CE
or
WE
is kept high for 100
μ
s after data input, the EEPROM enters write mode automatically
and the input data are written into the EEPROM.
Data
Polling
Data
polling allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a
write cycle, an inversion of the last byte of data to be loaded outputs from I/O7 to indicate that the
EEPROM is performing a write operation.
RDY/
Busy
Signal
RDY/
Busy
signal also allows status of the EEPROM to be determined. The RDY/
Busy
signal has high
impedance except in write cycle and is lowered to V
OL
after the first write signal. At the end of write cycle,
the RDY/
Busy
signal changes state to high impedance.
RES
Signal
When
RES
is low, the EEPROM cannot be read or programmed. Therefore, data can be protected by
keeping
RES
low when V
CC
is switched.
RES
should be high during read and programming because it
doesn’t provide a latch function.
V
Program inhibit
CC
RES
Program inhibit
Read inhibit
Read inhibit
WE
,
CE
Pin Operation
During a write cycle, addresses are latched by the falling edge of
WE
or
CE
, and data is latched by the
rising edge of
WE
or
CE
.
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| HN58V256AI | 256 k EEPROM (32-kword ×8-bit)(256k EEPROM (32k字 ×8位)) |
| HN58V256A | 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A) |
| HN58V256AFP-12 | 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A) |
| HN58V256AT-12 | 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A) |
| HN58V257AT-12 | 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HN58V1001FP-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| HN58V1001FP-25 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function |
| HN58V1001FP-25E | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:1M EEPROM (128-kword ?? 8-bit) Ready/Busy and RES function |
| HN58V1001P-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| HN58V1001P-25 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function |
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