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參數(shù)資料
| 型號： | HM624100H |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CFP -55 to 125 |
| 中文描述： | 4分高速SRAM（1 - Mword × 4位） |
| 文件頁數(shù)： | 2/13頁 |
| 文件大?。?/td> | 74K |
| 代理商： | HM624100H |
HM624100H Series
2
Ordering Information
Type No.
Access time
Package
HM624100HJP-10
HM624100HJP-12
HM624100HJP-15
10 ns
12 ns
15 ns
400-mil 32-pin plastic SOJ (CP-32DB)
HM624100HLJP-10
HM624100HLJP-12
HM624100HLJP-15
10 ns
12 ns
15 ns
Pin Arrangement
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A0
A1
A2
A3
A4
CS
I/O1
V
CC
V
SS
I/O2
WE
A5
A6
A7
A8
A9
A19
A18
A17
A16
A15
OE
I/O4
V
SS
V
CC
I/O3
A14
A13
A12
A11
A10
NC
(Top view)
HM624100HJP/HLJP Series
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM624100HLJP-10 | 4M High Speed SRAM (1-Mword x 4-bit) |
| HM624100HLJP-12 | 4M High Speed SRAM (1-Mword x 4-bit) |
| HM624100HLJP-15 | 4M High Speed SRAM (1-Mword x 4-bit) |
| HM624256A | 262144-word ×4-bit High Speed CMOS Static RAM(262144字 ×4位高速CMOS SRAM) |
| HM6264AFP-10 | Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CDIP -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM624100HC | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4M High Speed SRAM (1-Mword x 4-bit) |
| HM624100HCJP-10 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4M High Speed SRAM (1-Mword x 4-bit) |
| HM624100HCJP-12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM: Notes on Usage Technical Update/Device |
| HM624100HCLJP-10 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4M High Speed SRAM (1-Mword x 4-bit) |
| HM624100HCLJP-12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM: Notes on Usage Technical Update/Device |
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