參數(shù)資料
型號(hào)： HDMP-2689
英文描述： Quad 2.125/1.0625 GBd Fibre Channel General Purpose SerDes
中文描述： 四2.125/1.0625 GBd光纖通道通用的SerDes
文件頁(yè)數(shù)： 12/28頁(yè)
文件大?。?/td> 356K
代理商： HDMP-2689
12
Table 7. IEEE JTAG 1149.1 Instructions.
Instruction
Opcode
Description
EXTEST
00000_00000
Causes boundary JTAG registers to capture their inputs, shift, and output to pads.
SAMPLE
00000_00010
Causes boundary JTAG registers to capture their inputs.
CLAMP
00000_00100
Causes boundary JTAG registers to output their values to pads.
HIGHZ
00000_01000
Causes pads to be tri-stated.
BYPASS
11111_11111
Connects the bypass register between TDI and TDO.
Table 8. Format of a Management Frame.
Pr
St
Op
PhyAdd
RegAdd
TA
Data
IDLE
Read
11...1
01
10
aaaaa
rrrrr
Z0
DDDDDDDDDDDDDDDD
Z
Write
11...1
01
01
aaaaa
rrrrr
10
DDDDDDDDDDDDDDDD
Z
Figure 15. MDIO and MDC Timing.
MDC
MDIO
Table 9. MDIO Timing Characteristics,
T
C
= 0
°
C to T
C
= 85
°
C, V
DDQ
= 2.3 to 2.7 V, V
DD
= 1.7 to 1.9 V, V
DDA
= 1.7 to 1.9 V
Symbol
Parameters
Units
Min
Typ
Max
Driving
T
DELAY
MDC rising edge to MDIO data true or MDIO released
ns
0
300
T
MDC
MDC frequency
MHz
2.5
Receiving
T
SU
Set up time: MDIO to MDC rising edge
ns
10
T
H
Hold time: MDC rising edge to MDIO changing
ns
10
Note: For more information, see the IEEE 802.3 part 3 22.3.4,
“
MDIO timing relationship to MDC.
”
Figure 14. Receiver Latency.
RXP/N
10-BIT CHAR B
10-BIT CHAR C
RD[0]
RD[9]
RD[0:9]
RC
10-BIT CHAR A
RXLAT
10-BIT CHAR B
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