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參數(shù)資料
| 型號： | HDMP-0552 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | AGILENT HDMP-0552 QUAD PORT BYPASS CIRCUIT WITH CDR AND DATA VALID DETECTION |
| 中文描述： | 安捷倫劑量甲基強的松龍與CDR和數(shù)據(jù)有效0552四端口旁路電路檢測 |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 266K |
| 代理商： | HDMP-0552 |
10
AC Electrical Specifications
Ta = 0
°
C to Tc = +80
°
C , VCC = 3.15 V to 3.45 V
Symbol
Parameter
tdelay1
Total Loop Latency from FM_NODE[0] to TO_NODE[0]
tdelay2
Per Cell Latency from FM_NODE[x] to TO_NODE[x+1]
tr,LVTTLin
Input LVTTL Rise Time Requirement, 0.8 V to 2.0 V
tf,LVTTLin
Input LVTTL Fall Time Requirement, 2.0 V to 0.8 V
tr, LVTTLout
Output LVTTL Rise Time Range, 0.8 V to 2.0 V, 10 pF Load
tf, LVTTLout
Output LVTTL Fall Time Range, 2.0 V to 0.8 V, 10 pF Load
trs
2
,HS_OUT
HS_OUT Single-Ended Rise Time
tfs
2
,HS_OUT
HS_OUT Single-Ended Fall Time
trd
2
,HS_OUT
HS_OUT Differential Rise Time
tfd
2
,HS_OUT
HS_OUT Differential Fall Time
VIP,HS_IN
HS_IN Input Peak to Peak Required Differential Voltage Range
VOP,HS_OUT HS_OUT Output Pk-Pk Diff. Voltage Range (Zo = 75
W
)
Note:
2. Measured from 20% to 80% levels with trace length 3", Fr-4 board, Zo= 50 ohms and a 50 ohm and 200 fF termination.
Please refer to Figure 6 for simplified circuit schematic.
Power Dissipation and Thermal Resistance
Ta = 0
°
C to Tc = +80
°
C , VCC = 3.15 V to 3.45 V
Output Jitter Characteristics
Ta = 0
°
C to Tc = +80
°
C , VCC = 3.15 V to 3.45 V
Symbol
Parameter
RJ
Random Jitter at TO_NODE pins (1 sigma rms)
DJ
Deterministic Jitter at TO_NODE pins (pk-pk)
Please refer to Figures 8 and 9 for jitter measurement setup information.
Figure 7 - Eye Diagram obtained differentially at 2.125 GBd FROM NODE(0) TO NODE(2) with 50
W
termination
Symbol
PD
q
jc
Parameter
Power Dissipation
Thermal Resistance, Junction to Case
Units
W
°
C/W
Typical
1.1
2.5
Maximum
1.28
Units
ps
ps
Typical
3.5
10
Units Minimum Typical
ns
ns
ns
ns
ns
ns
ps
44
ps
44
ps
44
ps
44
mV
200
mV
1100
Maximum
4.0
0.8
1.5
0.4
2
2
1.5
2.0
65
65
65
65
110
110
110
110
2000
2000
1400
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