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參數(shù)資料
| 型號(hào)： | HD74AC |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | HD74AC Series Common Information |
| 中文描述： | HD74AC系列通用信息 |
| 文件頁數(shù)： | 26/52頁 |
| 文件大?。?/td> | 220K |
| 代理商： | HD74AC |
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Definition of Specifications
25
Consider the input. If the internal ground changes, the input voltage level appears to change to the DUT. If
the input rise time is slow enough, its level might still be in the device threshold region, or very close to it,
when the output switches. If the internally-induced voltage is large enough, it is possible to shift the
threshold region enough so that it re-crosses the input level. If the gain of the device is sufficient and the
input rise or fall time is slow enough, then the device may go into oscillation. As device propagation
delays become shorter, the inputs will have less time to rise or fall through the threshold region. As device
gains increase, the outputs will swing more, creating more induced voltage. Instantaneous current change
will be greater as outputs become quicker, generating more induced voltage.
Package-related causes of output oscillation are not entirely to blame for problems with input rise and fall
time measurements. All testers have V
CC
and ground leads with a finite inductance. This inductance needs
to be added to the inductance in the package to determine the overall voltage which will be induced when
the outputs change. As the reference for the input signals moves further away from the pin under test, the
test will be more susceptible to problems caused by the inductance of the leads and stray noise. Any noise
on the input signal will also cause problems. With FACT logic having gains as high as 100, it merely takes
a 50 mV change in the input to generate a full 5 V swing on the output.
3.4 Propagation Delays, f
max
, Set and Hold Times
A 1.0 MHz square wave is recommended for most propagation delay tests (figures 3 and 4) The repetition
rate must necessarily be increased for testing f
max
. A 50% duty cycle should always be used when testing
f
max
. Two pulse generators are usually required for testing such parameters as setup time, hold time,
recovery time etc.
DATA
IN
DATA
OUT
tpxx
tpxx
Vmi
Vmo
Vmi = 50% V
CC
for HD74AC devices; 1.5 V for HD74ACT devices
Vmo = 50% V
CC
for HD74AC/HD74ACT devices
Figure 3 Waveform for Inverting and Non-Inverting Functions
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HD74ALVC162244 | 16-bit Buffer / Driver with 3-state Outputs(帶三態(tài)輸出的16位緩沖器/驅(qū)動(dòng)器) |
| HD74ALVC162334 | 16-bit Universal Bus Driver with 3-state Outputs(帶三態(tài)輸出的16位通用總線驅(qū)動(dòng)器) |
| HD74ALVC16244 | 16-bit Buffer / Driver with 3-state Outputs(帶三態(tài)輸出的16位緩沖器/驅(qū)動(dòng)器) |
| HD74ALVC162831 | 1-bit to 4-bit Address Register / Driver with 3-state Outputs(三態(tài)輸出的1位-4位地址寄存器/驅(qū)動(dòng)器) |
| HD74ALVC162834A | 1-Of-8 Data Selectors/Multiplexers 16-CDIP -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD74AC00 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Quad 2-Input NAND Gate |
| HD74AC00FP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input NAND Gate |
| HD74AC00FPEL | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Quad 2-Input NAND Gate |
| HD74AC00P | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Quad 2-Input NAND Gate |
| HD74AC00RPEL | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Quad 2-Input NAND Gate |
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