參數(shù)資料
型號(hào): GS881E18T-V
廠商: GSI TECHNOLOGY
英文描述: 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs
中文描述: 為512k × 18,256K × 32,256K × 36 9Mb以上同步突發(fā)靜態(tài)存儲(chǔ)器
文件頁數(shù): 28/36頁
文件大?。?/td> 771K
代理商: GS881E18T-V
JTAG TAP Instruction Set Summary
Instruction
Code
Description
Notes
EXTEST
000
Places the Boundary Scan Register between TDI and TDO.
1
IDCODE
001
Preloads ID Register and places it between TDI and TDO.
1, 2
SAMPLE-Z
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
RFU
011
1
SAMPLE/
PRELOAD
100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
1
GSI
101
GSI private instruction.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
RFU
110
1
BYPASS
111
Places Bypass Register between TDI and TDO.
1
Notes:
1.
2.
Instruction codes expressed in binary, MSB on left, LSB on right.
Default instruction automatically loaded at power-up and in test-logic-reset state.
GS881E18/32/36B(T/D)-xxxV
Rev: 1.00 6/2006
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
28/36
2006, GSI Technology
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GS881E32BD-150IV 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs
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