參數(shù)資料
型號: GS8170S36
廠商: GSI TECHNOLOGY
英文描述: 16Mb(512K x 36Bit)Synchronous SRAM(16M位(512K x 36位)同步靜態(tài)RAM)
中文描述: 16Mb的(為512k × 36Bit)同步SRAM(1,600位(為512k × 36位)同步靜態(tài)內(nèi)存)
文件頁數(shù): 28/38頁
文件大?。?/td> 934K
代理商: GS8170S36
Rev: 1.01 11/2000
Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.
28/38
2000, Giga Semiconductor, Inc.
A
Advanced Information
GS8170S18/36/72B-333/300/275/250
Timing Parameter Key—Control and Data In Timing
JTAG Port Operation
Overview
The JTAG Port on this RAM operates in a manner consistent with IEEE Standard 1149.1-1990, a serial boundary scan interface
standard (commonly referred to as JTAG), but does not implement all of the functions required for 1149.1 compliance. Unlike
JTAG implementations that have been common among SRAM vendors for the last several years, this implementation does offer a
form of EXTEST, known as Clock Assisted EXTEST, reducing or eliminating the “hand coding” that has been required to
overcome the test program compiler errors caused by previous non-compliant implementations.
tKHnX
tnVKH
tAVKH
tKHAX
CK
A
A
B
C
E1, E2, E3,
W, Bn, ADV
DQ (Data In)
Early Write
tKHDX
tDVKH
DA
tKHDX
tDVKH
DA
tKHDX
tDVKH
DA
Late Write
Double Late Write
DQ (Data In)
DQ (Data In)
Note: tnVKH = tEVKH, tWVKH, tBVKH, etc. and tKHnX = tKHEX, tKHWX, tKHBX, etc.
DB
DC
DB
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