參數(shù)資料
型號: GS76024AB-10
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 256K x 24 6Mb Asynchronous SRAM
中文描述: 256K X 24 STANDARD SRAM, 10 ns, PBGA119
封裝: 14 X 22 MM, 1.27 MM PITCH, FPBGA-119
文件頁數(shù): 6/12頁
文件大?。?/td> 471K
代理商: GS76024AB-10
GS76024AB
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.02 12/2005
6/12
2003, GSI Technology
AC Characteristics
Read Cycle
Parameter
Symbol
-8
-10
-12
Unit
Min
Max
Min
Max
Min
Max
Read cycle time
t
8
10
12
ns
Address access time
t
8
10
12
ns
Chip enable access time (CE)
t
8
10
12
ns
Byte enable access time (UB, LB)
t
3.5
4
5
ns
Output enable to output valid (OE)
t
3.5
4
5
ns
Output hold from address change
t
3
3
3
ns
Chip enable to output in low Z (CE)
t
*
3
3
3
ns
Output enable to output in low Z (OE)
t
*
0
0
0
ns
Byte enable to output in low Z (UB, LB)
t
*
0
0
0
ns
Chip disable to output in High Z (CE)
t
*
4
5
6
ns
Output disable to output in High Z (OE)
t
*
3.5
4
5
ns
Byte disable to output in High Z (UB, LB)
t
*
3.5
4
5
ns
* These parameters are sampled and are not 100% tested
t
AA
t
OH
t
RC
Address
Data Out
Previous Data
Data valid
Read Cycle 1: CE = OE = V
IL
, WE = V
IH
RC
AA
AC
AB
OE
OH
LZ
OLZ
BLZ
HZ
OHZ
BHZ
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