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參數(shù)資料
| 型號： | GM5115-H |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | ONPANEL LCD PANEL CONTROLLER |
| 中文描述： | ONPANEL液晶顯示器控制器 |
| 文件頁數(shù)： | 53/58頁 |
| 文件大?。?/td> | 1505K |
| 代理商： | GM5115-H |
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***
Genesis Microchip Confidential ***
gm5115/25 Preliminary Data Sheet
June 2002
44
C5115-DAT-01H
The Read Address No Increment (0xA0) operation is illustrated in Figure 31. The highlighted
sections of the waveform represent moments when the transmitting device must release the HFSn
line and waits for an acknowledgement from the master receiver.
Note that on the last byte read, no acknowledgement is issued to terminate the transfer.
DATA
DEVCEADDRESS
DATA
DATA
START
ACK
ACK
OPERATONCODE
START
HFSn
HCLK
STOP
DEVCEADDRESS
REGSTERADDRESS
RW
ACK
RW
ACK
ACK
Figure 31.
2-Wire Read Operation (0xAx)
Please note that in all the above operations the operation code includes two address bits, as
described in Table 19.
4
4
.
.
1
1
8
8
M
M
i
i
s
s
c
c
e
e
l
l
l
l
a
a
n
n
e
e
o
o
u
u
s
s
F
F
u
u
n
n
c
c
t
t
i
i
o
o
n
n
s
s
4.18.1 Power Down Operation
The gm5115/25 provides a low power state in which the clocks to selected parts of the chip may be
disabled (see Table 21).
4.18.2 Pulse Width Modulation (PWM) Back Light Control
Many of today’s LCD back light inverters require both a PWM input and variable DC voltage to
minimize flickering (due to the interference between panel timing and inverter’s AC timing), and
adjust brightness. Most LCD monitor manufacturers currently use a microcontroller to provide
these control signals. To minimize the burden on the external microcontroller, the gm5115/25
generates these signals directly.
There are three pins available for controlling the LCD back light, PWM0 (GPIO0), PWM1
(GPIO1) and PWM2 (GPIO2). The duty cycle of these signals is programmable. They may be
connected to an external RC integrator to generate a variable DC voltage for a LCD back light
inverter. Panel HSYNC is used as the clock for a counter generating this output signal.
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