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參數資料
| 型號： | GM5115-H |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | ONPANEL LCD PANEL CONTROLLER |
| 中文描述： | ONPANEL液晶顯示器控制器 |
| 文件頁數： | 33/58頁 |
| 文件大?。?/td> | 1505K |
| 代理商： | GM5115-H |
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***
Genesis Microchip Confidential ***
gm5115/25 Preliminary Data Sheet
June 2002
24
C5115-DAT-01H
timing is different from the previously captured measurement by an amount exceeding this
threshold, a status bit is set. An interrupt can also be programmed to occur.
4.6.4 Watchdog
The watchdog monitors input VSYNC / HSYNC. When any HSYNC period exceeds the
programmed timing threshold (in terms of the selected IFM_CLK), a register bit is set. When any
VSYNC period exceeds the programmed timing threshold (in terms of HSYNC pulses), a second
register bit is set. An interrupt can also be programmed to occur.
4.6.5 Internal Odd/Even Field Detection
The IFM has the ability to perform field decoding of interlaced inputs to the ADC. The user
specifies start and end values to outline a “window” relative to HSYNC. If the VSYNC leading
edge occurs within this window, the IFM signals the start of an ODD field. If the VSYNC
leading edge occurs outside this window, an EVEN field is indicated (the interpretation of odd
and even can be reversed). The window start and end points are selected from a predefined set of
values.
HS
window
VS - even
VS - odd
Window
Start
Window End
Figure 17.
ODD/EVEN Field Detection
4.6.6 Input Pixel Measurement
The gm5115/25 provides a number of pixel measurement functions intended to assist in
configuring system parameters such as pixel clock, SDDS sample clocks per line and phase
setting, centering the image, or adjusting the contrast and brightness.
4.6.7 Image Phase Measurement
This function measures the sampling phase quality over a selected active window region. This
feature may be used when programming the source DDS to select the proper phase setting. Please
refer to the gm5115/25 Programming Guide for the optimized algorithm.
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