參數(shù)資料
型號(hào)： EVAL-ADAU1761Z
廠商： Analog Devices Inc
文件頁數(shù)： 50/92頁
文件大小： 0K
描述： BOARD EVAL FOR ADAU1761
標(biāo)準(zhǔn)包裝： 1
系列： SigmaDSP®
主要目的： 音頻編解碼器
嵌入式： 是，DSP
已用 IC / 零件： ADAU1761
主要屬性： 立體聲，24 位，8 ~ 96 kHz 采樣率，GUI 工具
次要屬性： I²C 和 GPIO 接口，2 差分和 1 個(gè)立體聲單端模擬輸入和輸出
已供物品： 2 個(gè)板，線纜，CD
產(chǎn)品目錄頁面： 776 (CN2011-ZH PDF)
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ADAU1761
Rev. C | Page 54 of 92
R2: Digital Microphone/Jack Detection Control, 16,392 (0x4008)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
JDDB[1:0]
JDFUNC[1:0]
Reserved
JDPOL
Table 36. Digital Microphone/Jack Detection Control Register
Bits
Bit Name
Description
[7:6]
JDDB[1:0]
Jack detect debounce time.
Setting
Debounce Time
00
5 ms (default)
01
10 ms
10
20 ms
11
[5:4]
JDFUNC[1:0]
JACKDET/MICIN pin function. Enables or disables the jack detect function or configures the pin for a digital
microphone input.
40 ms
Setting
Pin Function
00
Jack detect off (default)
01
Jack detect on
10
Digital microphone input
11
0
JDPOL
Jack detect polarity. Detects high or low signal.
0 = detect high signal (default).
1 = detect low signal.
Reserved
R3: Record Power Management, 16,393 (0x4009)
This register manages the power consumption for the record path. In particular, the current distribution for the mixer boosts, ADCs,
record path mixers, and PGAs can be set to one of four modes. These settings are normal operation, power saving mode, enhanced
performance mode, and extreme power saving mode. Each of these modes draws current from a central bias. Enhanced performance
mode offers the highest performance with the trade-off of higher power consumption.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
MXBIAS[1:0]
ADCBIAS[1:0]
RBIAS[1:0]
Reserved
Table 37. Record Power Management Register
Bits
Bit Name
Description
[6:5]
MXBIAS[1:0]
Mixer amplifier bias boost. Sets the boost level for the bias current of the record path mixers. In some cases,
the boost level enhances the THD + N performance.
Setting
Boost Level
00
Normal operation (default)
01
Boost Level 1
10
Boost Level 2
11
Boost Level 3
[4:3]
ADCBIAS[1:0]
ADC bias control. Sets the bias current for the ADCs based on the mode of operation selected.
Setting
ADC Bias Control
00
Normal operation (default)
01
Extreme power saving
10
Enhanced performance
11
Power saving
[2:1]
RBIAS[1:0]
Record path bias control. Sets the bias current for the PGAs and mixers in the record path.
Setting
Record Path Bias Control
00
Normal operation (default)
01
Reserved
10
Enhanced performance
11
Power saving
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