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| 型號： | EVAL-AD5757SDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 27/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD5757 |
| 標準包裝： | 1 |
| DAC 的數(shù)量： | 4 |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 設置時間： | 15µs |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 105°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD5757 |
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Data Sheet
AD5757
Rev. D | Page 33 of 44
Status Register
The status register is a read only register. This register contains
any fault information as a well as a ramp active bit and a user
toggle bit. When the STATREAD bit in the main control
register is set, the status register contents can be read back on
the SDO pin during every write sequence. Alternatively, if the
STATREAD bit is not set, the status register can be read using
the normal readback operation.
Table 28. Decoding the Status Register
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DC-
DCD
DC-
DCC
DC-
DCB
DC-
DCA
User
toggle
PEC
error
Ramp
active
Over
TEMP
I
OUT_D
fault
I
OUT_C
fault
I
OUT_B
fault
I
OUT_A
fault
1 X = don’t care.
Table 29. Status Register Options
Bit
Description
DC-DCD
This bit is set on Channel D if the dc-to-dc converter cannot maintain compliance (it may be reaching its V
MAX
voltage). In this case, the I
OUT_D fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
DC-DCC
This bit is set on Channel C if the dc-to-dc converter cannot maintain compliance (it may be reaching its V
MAX
voltage). In this case, the I
OUT_C fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
DC-DCB
This bit is set on Channel B if the dc-to-dc converter cannot maintain compliance (it may be reaching its V
MAX
voltage). In this case, the I
OUT_B fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
DC-DCA
This bit is set on Channel A if the dc-to-dc converter cannot maintain compliance (it may be reaching its V
MAX
voltage). In this case, the I
OUT_A fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
User toggle
User toggle bit. This bit is set or cleared via the software register. This can be used to verify data communications if
needed.
PEC Error
Denotes a PEC error on the last data-word received over the SPI interface.
Ramp Active
This bit is set while any one of the output channels is slewing (slew rate control is enabled on at least one channel).
Over TEMP
This bit is set if the AD5757 core temperature exceeds approximately 150°C.
I
OUT_D Fault
This bit is set if a fault is detected on the I
OUT_D pin.
I
OUT_C Fault
This bit is set if a fault is detected on the I
OUT_C pin.
I
OUT_B Fault
This bit is set if a fault is detected on the I
OUT_B pin.
I
OUT_A Fault
This bit is set if a fault is detected on the I
OUT_A pin.
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