TA = 25°C, unless oth" />
參數(shù)資料
型號(hào): EVAL-AD5757SDZ
廠商: Analog Devices Inc
文件頁數(shù): 2/44頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD5757
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 4
位數(shù): 16
數(shù)據(jù)接口: 串行
設(shè)置時(shí)間: 15µs
DAC 型: 電流
工作溫度: -40°C ~ 105°C
已供物品:
已用 IC / 零件: AD5757
AD5757
Data Sheet
Rev. D | Page 10 of 44
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. Transient currents of up to
100 mA do not cause SCR latch-up.
Table 4.
Parameter
Rating
AV
DD, VBOOST_x to AGND, DGND
0.3 V to +33 V
AV
CC to AGND
0.3 V to +7 V
DV
DD to DGND
0.3 V to +7 V
Digital Inputs to DGND
0.3 V to DV
DD + 0.3 V or +7 V
(whichever is less)
Digital Outputs to DGND
0.3 V to DV
DD + 0.3 V or +7 V
(whichever is less)
REFIN, REFOUT to AGND
0.3 V to AV
DD + 0.3 V or +7 V
(whichever is less)
I
OUT_x to AGND
AGND to V
BOOST_x or 33 V if using
the dc-to-dc circuitry
SW
x to AGND
0.3 V to +33 V
AGND, GNDSW
x to DGND
0.3 V to +0.3 V
Operating Temperature Range (T
A)
Industrial1
40°C to +105°C
Storage Temperature Range
65°C to +150°C
Junction Temperature (T
J max)
125°C
64-Lead LFCSP
θ
JA Thermal Impedance
28°C/W
Power Dissipation
(T
J max – TA)/θJA
Lead Temperature
JEDEC industry standard
Soldering
J-STD-020
1 Power dissipated on chip must be derated to keep the junction temperature
below 125°C.
2 Based on a JEDEC 4-layer test board.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
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