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參數(shù)資料
| 型號(hào)： | EBD21RD4ADNA-6B-E |
| 廠(chǎng)商： | ELPIDA MEMORY INC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 2GB Registered DDR SDRAM DIMM (256M words X72 bits, 2 Ranks) |
| 中文描述： | 256M X 72 DDR DRAM MODULE, 0.7 ns, DMA184 |
| 封裝： | LEAD FREE, DIMM-184 |
| 文件頁(yè)數(shù)： | 6/19頁(yè) |
| 文件大?。?/td> | 201K |
| 代理商： | EBD21RD4ADNA-6B-E |
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EBD21RD4ADNA-E
Data Sheet E0606E10 (Ver. 1.0)
6
Byte No.
Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value
Comments
27
Minimum row precharge time (tRP)
-6B
0
1
0
0
1
0
0
0
48H
18ns
-7A, -7B
0
1
0
1
0
0
0
0
50H
20ns
28
Minimum row active to row active
delay (tRRD)
-6B
0
0
1
1
0
0
0
0
30H
12ns
-7A, -7B
0
0
1
1
1
1
0
0
3CH
15ns
29
Minimum /RAS to /CAS delay (tRCD)
-6B
0
1
0
0
1
0
0
0
48H
18ns
-7A, -7B
0
1
0
1
0
0
0
0
50H
20ns
30
Minimum active to precharge time
(tRAS)
-6B
0
0
1
0
1
0
1
0
2AH
42ns
-7A, -7B
0
0
1
0
1
1
0
1
2DH
45ns
31
Module rank density
0
0
0
0
0
0
0
1
01H
2 ranks
1GB
32
Address and command setup time
before clock (tIS)
-6B
0
1
1
1
0
1
0
1
75H
0.75ns*
3
-7A, -7B
1
0
0
1
0
0
0
0
90H
0.9ns*
3
33
Address and command hold time after
clock (tIH)
-6B
0
1
1
1
0
1
0
1
75H
0.75ns*
3
-7A, -7B
1
0
0
1
0
0
0
0
90H
0.9ns*
3
34
Data input setup time before clock
(tDS)
-6B
0
1
0
0
0
1
0
1
45H
0.45ns*
3
-7A, -7B
0
1
0
1
0
0
0
0
50H
0.5ns*
3
35
Data input hold time after clock (tDH)
-6B
0
1
0
0
0
1
0
1
45H
0.45ns*
3
-7A, -7B
0
1
0
1
0
0
0
0
50H
0.5ns*
3
36 to 40
Superset information
0
0
0
0
0
0
0
0
00H
Future use
41
Active command period (tRC)
-6B
0
0
1
1
1
1
0
0
3CH
60ns*
3
-7A, -7B
0
1
0
0
0
0
0
1
41H
65ns*
3
42
Auto refresh to active/
Auto refresh command cycle (tRFC)
-6B
0
1
0
0
1
0
0
0
48H
72ns*
3
-7A, -7B
0
1
0
0
1
0
1
1
4BH
75ns*
3
43
SDRAM tCK cycle max. (tCK max.)
0
0
1
1
0
0
0
0
30H
12ns*
3
44
Dout to DQS skew
-6B
0
0
1
0
1
1
0
1
2DH
450ps*
3
-7A, -7B
0
0
1
1
0
0
1
0
32H
500ps*
3
45
Data hold skew (tQHS)
-6B
0
1
0
1
0
1
0
1
55H
550ps*
3
-7A, -7B
0
1
1
1
0
1
0
1
75H
750ps*
3
46 to 61
Superset information
0
0
0
0
0
0
0
0
00H
Future use
62
SPD revision
0
0
0
0
0
0
0
0
00H
Initial
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| EBD21RD4ADNA-7A-E | 2GB Registered DDR SDRAM DIMM (256M words X72 bits, 2 Ranks) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EBD21RD4ADNA-7A | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:2GB Registered DDR SDRAM DIMM (256M words X72 bits, 2 Ranks) |
| EBD21RD4ADNA-7A-E | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:2GB Registered DDR SDRAM DIMM (256M words X72 bits, 2 Ranks) |
| EBD21RD4ADNA-7B | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:2GB Registered DDR SDRAM DIMM (256M words X72 bits, 2 Ranks) |
| EBD21RD4ADNA-7B-E | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:2GB Registered DDR SDRAM DIMM (256M words X72 bits, 2 Ranks) |
| EBD21RD4ADNA-E | 制造商:ELPIDA 制造商全稱(chēng):Elpida Memory 功能描述:2GB Registered DDR SDRAM DIMM (256M words X72 bits, 2 Ranks) |
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