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參數資料
| 型號： | EBD10RD4ADFA-7A |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | RES MFLM 2K 0.1W 5% SMT0805 |
| 中文描述： | 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| 封裝： | DIMM-184 |
| 文件頁數： | 9/19頁 |
| 文件大小： | 219K |
| 代理商： | EBD10RD4ADFA-7A |
EBD10RD4ADFA
Data Sheet E0430E20 (Ver. 2.0)
9
Differential Clock Net Wiring (CK0, /CK0)
120
240
(Typically two registers per DIMM)
0ns (nominal)
240
120
120
CK0
Notes: 1. The clock delay from the input of the PLL clock to the input of any SDRAM or register willl
be set to 0 ns (nominal).
2. Input, output and feedback clock lines are terminated from line to line as shown, and not
from line to ground.
3. Only one PLL output is shown per output type. Any additional PLL outputs will be wired
in a similar manner.
4. Termination resistors for feedback path clocks are located after the pins of the PLL.
C
/CK0
SDRAM
stack
SDRAM
stack
Register1
Register2
PLL
Feedback
IN
OUT1
OUT'N'
相關PDF資料 |
PDF描述 |
|---|---|
| EBD10RD4ADFA | 1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank) |
| EBD10RD4ADFA-6B | 1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank) |
| EBD10RD4ADFA-7B | 1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank) |
| EBD10RD4ADFA-7B-E | 1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank) |
| EBD10RD4ADFA-E | 1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| EBD10RD4ADFA-7A-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank) |
| EBD10RD4ADFA-7B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank) |
| EBD10RD4ADFA-7B-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank) |
| EBD10RD4ADFA-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank) |
| EBD11ED8ABFA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Unbuffered DDR SDRAM DIMM |
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