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參數(shù)資料
| 型號(hào)： | EB402 |
| 英文描述： | EB402 Evaluation Board user＇s guide 7/01 |
| 中文描述： | EB402評(píng)估板用戶指南7月1日 |
| 文件頁數(shù)： | 35/84頁 |
| 文件大?。?/td> | 1014K |
| 代理商： | EB402 |
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3-18
Hardware Overview
The codec module’s jumper settings are shown in Table 3.5.
To connect input frame sync to output frame sync, install jumper J1. This
is the default conguration.
To enable the codec’s 16.384 MHz oscillator, install a jumper to connect
pins 1–2 of J2. This is the default conguration.
To cascade the AD73322s, you must install two jumpers: connect
pins 1–2 of J4; connect pins 1–2 of J5. This is the default conguration.
To operate the codec using a single AD73322, install two jumpers:
connect pins 2–3 pins of J4; connect pins 2–3 of J5.
3.3.4 Host Processor Interface (HPI)
The LSI402ZX HPI is an asynchronous 16-bit parallel port that allows an
external device to connect to the EB402. The HPI supports word
transfers for Motorola- and Intel-style memory interfaces. The LSI402ZX
internal boot ROM supports downloading code through the HPI, so an
external device connected to this interface can download code from a
host processor to the DSP. Refer to LSI402ZX Digital Signal Processor
User’s Guide for more information. The pinouts of the HPI connector, J6,
are shown in Figure 5.3 on page 5-7.
Table 3.5
BD-EBM-CODEC-1 Jumper Settings and Descriptions
No.
Label
Description
Pin 1
Pin 2
Pin 3
Default
Position
J1
FS
Connects frame sync
output to frame sync input
SORFS
SOXFS
N/A
Installed
J2
MCLK
Enables the on-board
16.384 MHz clock
DVDD
OSC EN
DGND
Pins 1–2
J4
FS
Congures codec for
cascade mode
C_B_OFS
SORFS
C_A_OFS
Pins 1–2
J5
DO
Congures codec for
cascade mode
CODEC_B_DO
SOD1
CODEC_A_DO Pins 1–2
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