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參數(shù)資料
| 型號： | EB402 |
| 英文描述： | EB402 Evaluation Board user＇s guide 7/01 |
| 中文描述： | EB402評估板用戶指南7月1日 |
| 文件頁數(shù)： | 22/84頁 |
| 文件大?。?/td> | 1014K |
| 代理商： | EB402 |
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PIO[7:0] (Programmable I/Os)
3-7
3.1.8 HALT (Halt Processor Clock)
HALT is an input to the LSI402ZX. When HALT is asserted, the
processor clock is disabled and halts the processor. This signal is pulled
LOW on the EB402. To halt the processor while it is running, install
jumper JP4.
RSTN or NMI must be used to wake a halted DSP. RSTN resets the
processor. NMI restarts the processor from where it has halted.
3.2 PIO[7:0] (Programmable I/Os)
The LSI402ZX has 8 programmable input/output (PIO) signals. These
signals are used by the LSI402ZX internal boot ROM and the Evaluation
Board itself. Some programmable I/O signals are available to the user on
the EEI. Refer to LSI402ZX Digital Signal Processor User’s Guide for
additional information about the LSI402ZX PIO signals.
The EB402 uses the PIOs to control the codecs, control the EEI, and
select the HPI mode. The PIOs can also be used for testing the
Evaluation Board and the user’s programs. The PIO signals have
user-congured jumpers to select pull up/pull-down termination for these
signals. The jumpers and resistors are shown in Figure 3.1.
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