參數(shù)資料
型號: DS26303LN-75+A3
廠商: Maxim Integrated Products
文件頁數(shù): 24/101頁
文件大?。?/td> 0K
描述: IC LIU E1/T1/J1 3.3V 144-ELQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 8/8
規(guī)程: T1/E1/J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 144-LQFP 裸露焊盤
包裝: 托盤
其它名稱: 90-26303+7N3
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
29 of 101
5.1
Register Description
This section details the register description of each bit. Whenever the variable “n” in italics is used in any of the
register descriptions, it represents 1, 2, 3, 4, 5, 6, 7, and 8.
5.1.1
Primary Registers
Register Name:
ID
Register Description:
Identification Register
Register Address:
00h
Bit #
7
6
5
4
3
2
1
0
Name
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
Bit 7: Device CODE ID Bit 7 (ID7).
This bit is zero for the 75
Ω impedance part number and one for the 120Ω
impedance part number.
Bits 6 to 3: Device CODE ID Bits 6 to 3 (ID6 to ID3).
These bits tell the user the number of ports the device
contains.
Bits 2 to 0: Device CODE ID Bits 2 to 0 (ID2 to ID0).
These bits tell the user the revision of the part. Contact the
factory for details.
Register Name:
ALBC
Register Description:
Analog Loopback Configuration Register
Register Address:
01h
Bit #
7
6
5
4
3
2
1
0
Name
ALBC8
ALBC7
ALBC6
ALBC5
ALBC4
ALBC3
ALBC2
ALBC1
Default
0
Bits 7 to 0: Analog Loopback Configuration Bits Channel n (ALBCn).
When this bit is set, LIUn is placed in
analog loopback. TTIPn and TRINGn are looped back to RTIPn and RRINGn. The data at RTIPn and RRINGn is
ignored. The LOS detector is still in operation. The jitter attenuator is in use if enabled for the transmitter or
receiver.
Register Name:
RLBC
Register Description:
Remote Loopback Configuration Register
Register Address:
02h
Bit #
7
6
5
4
3
2
1
0
Name
RLBC8
RLBC7
RLBC6
RLBC5
RLBC4
RLBC3
RLBC2
RLBC1
Default
0
Bits 7 to 0: Remote Loopback Configuration Bits Channel n (RLBCn).
When this bit is set, remote loopback is
enabled on LIUn. The analog-received signal goes through the receiver and is looped back to the transmitter. The
data at TPOSn and TNEGn is ignored. The jitter attenuator is in use if enabled. Note: LIUn is placed in dual
loopback if DLBC:DLBCn is also set.
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