參數(shù)資料
型號: DS21FT44
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA300
封裝: 27 X 27 MM, 1.27 MM PITCH, MCMBGA-300
文件頁數(shù): 65/117頁
文件大?。?/td> 691K
代理商: DS21FT44
DS21FT44/DS21FF44
51 of 117
receiving HDB3 code. This counter increments at all times and is not disabled by loss of sync conditions.
The counter saturates at 65,535 and will not rollover. The bit error rate on a E1 line would have to be
greater than 10** –2 before the VCR would saturate.
VCR1: UPPER BIPOLAR VIOLATION COUNT REGISTER 1 (Address = 00 Hex)
VCR2: LOWER BIPOLAR VIOLATION COUNT REGISTER 2 (Address = 01 Hex)
(MSB)
(LSB)
V15
V14
V13
V12
V11
V10
V9
V8
VCR1
V7
V6
V5
V4
V3
V2
V1
V0
VCR2
SYMBOL
POSITION
NAME AND DESCRIPTION
V15
VCR1.7
MSB of the 16-bit code violation count
V0
VCR2.0
LSB of the 10-bit code violation count
CRC4 Error Counter
CRC4 Count Register 1 (CRCCR1) is the most significant word and CRCCR2 is the least significant
word of a 10–bit counter that records word errors in the Cyclic Redundancy Check 4 (CRC4). Since the
maximum CRC4 count in a one second period is 1000, this counter cannot saturate. The counter is
disabled during loss of sync at either the FAS or CRC4 level; it will continue to count if loss of
multiframe sync occurs at the CAS level.
CRCCR1: CRC4 COUNT REGISTER 1 (Address = 02 Hex)
CRCCR2: CRC4 COUNT REGISTER 2 (Address = 03 Hex)
(MSB)
(LSB)
****
*
CRC9
CRC8
CRCCR1
CRC7
CRC6
CRC5
CRC4
CRC3
CRC2
CRC1
CRC0
CRCCR2
SYMBOL
POSITION
NAME AND DESCRIPTION
CRC9
CRCCR1.1
MSB of the 10-Bit CRC4 error count
CRC0
CRCCR2.0
LSB of the 10-Bit CRC4 error count
*The upper 6 bits of CRCCR1 at address 02 are the most significant bits of the 12–bit FAS error counter.
相關(guān)PDF資料
PDF描述
DS21Q352 DATACOM, PCM TRANSCEIVER, PBGA256
DS21Q354 DATACOM, PCM TRANSCEIVER, PBGA256
DS21Q41BT DATACOM, FRAMER, PQFP128
DS21Q42TN DATACOM, FRAMER, PQFP128
DS21Q42T DATACOM, FRAMER, PQFP128
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