參數(shù)資料
型號: DS21FT44
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA300
封裝: 27 X 27 MM, 1.27 MM PITCH, MCMBGA-300
文件頁數(shù): 61/117頁
文件大?。?/td> 691K
代理商: DS21FT44
DS21FT44/DS21FF44
48 of 117
SR2: STATUS REGISTER 2 (Address = 07 Hex)
(MSB)
(LSB)
RMF
RAF
TMF
SEC
TAF
LOTC
RCMF
TSLIP
SYMBOL
POSITION
NAME AND DESCRIPTION
RMF
SR2.7
Receive CAS Multiframe. Set every 2ms (regardless if CAS
signaling is enabled or not) on receive multiframe boundaries.
Used to alert the host that signaling data is available.
RAF
SR2.6
Receive Align Frame. Set every 250s at the beginning of
align frames. Used to alert the host that Si and Sa bits are
available in the RAF and RNAF registers.
TMF
SR2.5
Transmit Multiframe. Set every 2ms (regardless if CRC4 is
enabled) on transmit multiframe boundaries. Used to alert the
host that signaling data needs to be updated.
SEC
SR2.4
One Second Timer. Set on increments of one second based on
RCLK. If CCR2.7 = 1, then this bit will be set every 62.5ms
instead of once a second.
TAF
SR2.3
Transmit Align Frame. Set every 250s at the beginning of
align frames. Used to alert the host that the TAF and TNAF
registers need to be updated.
LOTC
SR2.2
Loss of Transmit Clock. Set when the TCLK pin has not
transitioned for one channel time (or 3.9s). Will force the
LOTC pin high if enabled by TCR2.0.
RCMF
SR2.1
Receive CRC4 Multiframe. Set on CRC4 multiframe
boundaries; will continue to be set every 2ms on an arbitrary
boundary if CRC4 is disabled.
TSLIP
SR2.0
Transmit Elastic Store Slip. Set when the elastic store has
either repeated or deleted a frame of data.
相關(guān)PDF資料
PDF描述
DS21Q352 DATACOM, PCM TRANSCEIVER, PBGA256
DS21Q354 DATACOM, PCM TRANSCEIVER, PBGA256
DS21Q41BT DATACOM, FRAMER, PQFP128
DS21Q42TN DATACOM, FRAMER, PQFP128
DS21Q42T DATACOM, FRAMER, PQFP128
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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