參數(shù)資料
型號： DAC5674IPHPG4
廠商： Texas Instruments
文件頁數(shù)： 34/39頁
文件大小： 0K
描述： IC DAC 14BIT 400MSPS 48-HTQFP
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 250
系列： CommsDAC™
設(shè)置時(shí)間： 20ns
位數(shù)： 14
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 550mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 48-HTQFP（7x7）
包裝： 托盤
輸出數(shù)目和類型： 2 電流，單極
采樣率（每秒）： 400M
配用： 296-30860-ND - EVAL MODULE FOR DAC5674
DAC5674
SLWS148A SEPTEMBER 2003 REVISED OCTOBER 2005
www.ti.com
4
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
over recommended operating free-air temperature range, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 3.3 V, IOVDD = 3.3 V, DVDD = 1.8 V,
IOUTFS = 20 mA, Rset = 1.91 k, internal reference, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY (CONTINUED)
IDVDD
Digital supply current
AVDD = 3.3 V, DVDD = 1.8 V, 4
× interpolation,
PLL on, 9-MHz IF, 400 MSPS
107
140
mA
ISLEEP3.3 Sleep mode
Sleep mode, supply current 3.3 V
6
12
mA
ISLEEP1.8 Sleep mode
Sleep mode, supply current 1.8 V
0.5
3
mA
IPLLVDD
PLL supply current(1)
Fdata = 100 MSPS, Fupdate = 400 MSPS,
DIV[1:0] = ’00’, AVDD = 3.3 V, DVDD = 1.8 V, 4
×
interpolation, PLL on, 9-MHz IF, 400 MSPS
23
35
mA
IIOVDD
Buffer supply current
AVDD = 3.3 V, DVDD = 1.8 V, 4
× interpolation,
PLL on, 9-MHz IF, 400 MSPS
4
10
mA
ICLKVDD
Clock supply current(1)
AVDD = 3.3 V, DVDD = 1.8 V, 4
× interpolation,
PLL on, 9-MHz IF, 400 MSPS
6
10
mA
PD
Power dissipation
AVDD = 3.3 V, DVDD = 1.8 V, 4
× interpolation,
PLL on, 9-MHz IF, 400 MSPS
435
550
mW
APSRR
Power supply rejection ratio
0.2
%FSR/V
DPSRR
0.2
%FSR/V
Operating range
40
85
°C
Specifications subject to change without notice.
(1) PLL enabled
AC ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 3.3 V, IOVDD = 1.8 V, DVDD = 1.8 V,
IOUTFS = 20 mA, differential transformer coupled output, 50-
doubly terminated load (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG OUTPUT
fCLK
Maximum output update rate
400
MSPS
ts(DAC)
Output settling time to 0.1%
Midscale transition
20
ns
tr(IOUT)
Output rise time 10% to 90%(1)
1.4
ns
tf(IOUT)
Output fall time 90% to 10%(1)
1.5
ns
Output noise
IOUTFS = 20 mA
55
pA/
√HZ
Output noise
IOUTFS = 2 mA
30
pA/
√HZ
AC LINEARITY 1:1 IMPEDANCE RATIO TRANSFORMER (ALL AC MEASUREMENTS PLLVDD = 0 V)
Spurious free dynamic range (First
fDATA = 52 MSPS, fOUT = 14 MHz, TA = 25_C
85
SFDR
Spurious free dynamic range (First
Nyquist zone < fDATA/2) X4 LL-mode
fDATA = 100 MSPS, fOUT = 21 MHz, TMIN to TMAX
76
dBc
SFDR
Nyquist zone < fDATA/2) X4 LL-mode
fDATA = 100 MSPS, fOUT = 41 MHz, TMIN to TMAX
71
dBc
SNR
Signal-to-noise ratio (First Nyquist
fDATA = 78 MSPS, fOUT = 20 MHz, TMIN to TMAX
71
dB
SNR
Signal-to-noise ratio (First Nyquist
zone < fDATA/2) X4 LL-mode
fDATA = 100 MSPS, fOUT = 20 MHz, TMIN to TMAX
70
dB
ACPR
Adjacent channel power ratio
W-CDMA signal with 3.84-MHz BW
fDATA = 61.44 MSPS, IF = 15.360 MHz, X4 LL-mode
74
dB
ACPR
W-CDMA signal with 3.84-MHz BW
5-MHz channel spacing
fDATA = 122.88 MSPS, IF = 30.72 MHz, X2 L-mode
69
dB
IMD3
Third-order, two-tone intermodulation
fDATA = 61.44 MSPS, fOUT = 45.4 and 46.4 MHz,
X4 HL-mode
68
dBc
IMD3
Third-order, two-tone intermodulation
(each tone at 6 dBFS)
fDATA = 61.44 MSPS, fOUT = 15.1 and 16.1 MHz,
X4 LL-mode
82
dBc
IMD
Four-tone Intermodulation to Nyquist
fDATA = 78 MSPS fOUT = 15.6 MHz, 15.8 MHz,
16.2 MHz, 16.4 MHz, X4 LL-mode
76
dBc
IMD
Four-tone Intermodulation to Nyquist
(each tone at –12 dBFS)
fDATA = 52 MSPS fOUT = 68.8 MHz, 69.6 MHz,
71.2 MHz, 72 MHz, X4 HH-mode
64
dBc
(1) Measured single-ended into 50- load.
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