參數(shù)資料
型號： DAC1208D650HN
廠商： NXP SEMICONDUCTORS
元件分類： DAC
英文描述： Dual 12-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
中文描述： 12-BIT DAC, PQCC64
封裝： 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
文件頁數(shù)： 85/98頁
文件大?。?/td> 557K
代理商： DAC1208D650HN
DAC1208D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 14 December 2010
85 of 98
NXP Semiconductors
DAC1208D650
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A interface
10.15.2.14
Page 7 bit definition detailed description
Please refer to
Table 173
for a register overview and their default values. In the following
tables, all the values emphasized in bold are the default values.
Table 174. LN2_CFG_0 register (address 00h) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 0
LN2_DID[7:0]
Access
R
Value
-
Description
lane 2 device ID
Table 175. LN2_CFG_1 register (address 01h) bit description
Default settings are shown highlighted.
Bit
Symbol
3 to 0
LN2_BID[3:0]
Access
R
Value
-
Description
lane 2 bank ID
Table 176. LN2_CFG_2 register (address 02h) bit description
Default settings are shown highlighted.
Bit
Symbol
4 to 0
LN2_LID[4:0]
Access
R
Value
-
Description
lane 2 lane ID
Table 177. LN2_CFG_3 register (address 03h) bit description
Default settings are shown highlighted.
Bit
Symbol
7
LN2_SCR
4 to 0
LN2_L[4:0]
Access
R
R
Value
-
-
Description
scrambling on
number of lanes minus 1
Table 178. LN2_CFG_4 register (address 04h) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 0
LN2_F[7:0]
Access
R
Value
-
Description
number of octets per frame minus 1
Table 179. LN2_CFG_5 register (address 05h) bit description
Default settings are shown highlighted.
Bit
Symbol
4 to 0
LN2_K[4:0]
Access
R
Value
-
Description
number of frames per multiframe minus 1
Table 180. LN2_CFG_6 register (address 06h) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 0
LN2_M[7:0]
Access
R
Value
-
Description
number of converters per device minus 1
Table 181. LN2_CFG_7 register (address 07h) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 6
LN2_CS[1:0]
4 to 0
LN2_N[4:0]
Access
R
R
Value
-
-
Description
number of control bits
converter resolution minus 1
相關(guān)PDF資料
PDF描述
DAC1208D650HN Dual 12-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
DAC1208D750HN Dual 12-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
DAC1208D750HN Dual 12-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
DL-5538S-C550-SB 1270 nm ~ 1610 nm DFB LD MODULES 2.5 Gbps CWDM MQW-DFB LD RECEPTACLE
DL-5538S-C450-FB 1270 nm ~ 1610 nm DFB LD MODULES 2.5 Gbps CWDM MQW-DFB LD RECEPTACLE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DAC1208D650HN/C1,5 功能描述:數(shù)模轉(zhuǎn)換器- DAC DL 12BIT DAC 650MSPS 2X 4X OR 8X INT RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC1208D650HN-C1 制造商:Integrated Device Technology Inc 功能描述:HVQFN64 - Bulk
DAC1208D650HN-C18 制造商:Integrated Device Technology Inc 功能描述:HVQFN64 - Tape and Reel
DAC1208D650W1/DB,598 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 DAC DEMOBOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*