參數(shù)資料
型號: DAC1208D650HN
廠商: NXP SEMICONDUCTORS
元件分類: DAC
英文描述: Dual 12-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
中文描述: 12-BIT DAC, PQCC64
封裝: 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
文件頁數(shù): 35/98頁
文件大小: 557K
代理商: DAC1208D650HN
DAC1208D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 14 December 2010
35 of 98
NXP Semiconductors
DAC1208D650
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A interface
Figure 23
is an example of a DC interface connected to an AQM with a common-mode
input level (V
i(cm)
) of 1.7 V when using auxiliary DACs.
Figure 24
is an example of a DC interface connected to an to an AQM with a
common-mode input level (V
i(cm)
) of 3.3 V when using auxiliary DACs.
The constraints to adjusting the interface are the output compliance range of the DAC and
the auxiliary DACs, the input common-mode level of the AQM, and the range of offset
correction.
Fig 23. Example of a DC interface connected to an AQM with a V
i(cm)
of 1.7 V when using
auxiliary DACs
Fig 24. Example of a DC interface connected to an AQM with a V
i(cm)
of 3.3 V when using
auxiliary DACs
001aaj543
51.1
Ω
51.1
Ω
442
Ω
442
Ω
V
DDA(3V3)
IOUTnP
IOUTnN
0 mA to 20 mA
BBP
BBN
AQM (V
i(cm)
= 1.7 V)
698
Ω
698
Ω
51.1
Ω
51.1
Ω
AUXnP
AUXnN
1.1 mA (typ.)
(1)
IOUTnP/IOUTnN; V
o(cm)
= 2.67 V; V
o(dif)(p-p)
= 1.94 V
(2)
BBP/BBN; V
i(cm)
= 1.7 V; V
i(dif)(p-p)
= 1.23 V; offset correction up to 36 mV
(1)
(2)
001aaj544
54.9
Ω
54.9
Ω
237
Ω
237
Ω
3.3 V
IOUTnP
IOUTnN
AUXnP
AUXnN
BBP
BBN
AQM (V
i(cm)
= 3.3 V)
750
Ω
750
Ω
5 V
634
Ω
634
Ω
442
Ω
442
Ω
(1)
IOUTnP/IOUTnN; V
o(cm)
= 2.75 V; V
o(dif)(p-p)
= 1.96 V
(2)
BBP/BBN; V
i(cm)
= 3.3 V; V
i(dif)(p-p)
= 1.5 V; offset correction up to 36 mV
(1)
(2)
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