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參數(shù)資料
| 型號(hào)： | CT1820 |
| 廠商： | Aeroflex Inc. |
| 英文描述： | CT1820 Data Terminal Bit Processor for MIL-STD-1553 A & B |
| 中文描述： | CT1820數(shù)據(jù)終端位處理器的MIL - STD - 1553的阿 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大小： | 144K |
| 代理商： | CT1820 |
Aeroflex Circuit Technology
SCDCT1820 REV D 6/25/99 Plainview NY (516) 694-6700
3
PIN ASSIGNMENTS AND LOADING
In the following table, the symbols are defined as follows:
I
IH
= maximum input HIGH current with V
IN
= 2.5 volts
I
IL
= maximum input LOW current with V
IN
= 0.4 volts
I
OH
= maximum output HIGH current for V
OUT
= 2.5 volts minimum
I
OL
= maximum output LOW current for V
OUT
= 0.4 volts maximum
* Indicates use of an internal pull-up resistor
Pin
No
Name
CT1555-3
CT1820
CT1820-2
Description
I
IH
(μA)
I
IL
(μA)
I
OH
(μA)
I
OL
(mA
I
IH
(μA)
I
IL
(μA)
I
OH
(μA)
I
OL
(mA
I
OL
(mA)
1
VCC
+5V Power Input
2
D8
40
-0.4
-1000 2.4
20
-0.4 -1000
6.0
10.0
Part of 16 Bit TRI-STATE l/O
3
D9
4
D10
5
D11
6
D12
7
DATA SELECT 1
20
-0.4
20
-0.4
A LOW on this input applies the contents of the SECOND
RANK REC’V REG to the D8-D15 I/O pins
8
A3*
-1500
-3.2
20
-0.4
Part of 5 Bit ADDRESS INPUT
9
A2*
10
A1*
11
GROUND
Logic and power return
12
A4*
-1500
-3.2
20
-0.4
MSB of 5 Bit ADDRESS INPUT
13
A0*
LSB of 5 Bit ADDRESS INPUT
14
VALID WORD
-400
2.4
-400
4.0
4.0
A LOW on this output indicates receipt of avalid word
15
FAIL SAFE
-400
2.4
-400
4.0
4.0
A HIGH on this output indicates termination of a
transmitted message that exceeds 768μs.
16
COMM / DATA SYNC
- 380
2.4
-400
4.0
4.0
A HIGH on this output indicates COMMAND (or STATUS)
word reception. A LOW indicates DATA word reception.
17
CLOCK IN
±30 ±0.003
+100
-3
+100
-3
Input for 12MHz clock (20pf load).
18
CLOCK OUT
-1000 1.0
-1000
1.0
1.0
Output of OSCILLATOR AND CLOCK DRIVER.
19
S / T SELECT
40
-0.8
20
-0.4
A HIGH on this input sets the unit in the self test mode.
20
CASE
CASE CONNECTION
21
DATA IN
20
-0.4
20
-0.4
A HIGH on this input represents a positive state on the
bus.
22
DATA IN
20
-0.4
20
-0.4
A HIGH on this input represents a negative state on the
bus. (Pins 21 and 22 must both be high when the bus is
inactive.)
23
ENC ENA
20
-0.4
20
-0.4
A LOW on this input initiates a transmit cycle.
24
SYNC SEL
20
-0.4
20
-0.4
Actuates COMMAND (or STATUS) sync for an input LOW
and DATA sync for an input HIGH.
25
DATA OUT
360
2.4
-400
4.0
4.0
A HIGH on this output produces a positive state on the
bus.
26
DATA OUT
360
2.4
-400
4.0
4.0
A HIGH on this output produces a negative state on the
bus.
27
SEND DATA
380
2.4
-400
4.0
4.0
A HlGH on this output indicates data shifting during the
transmit cycle.
28
ESC OUT
1000
1.2
-1000
1.2
1.2
LOW to HIGH transitions on thls output during HIGH
SEND DATA cause the transmit cycle data shifting to
occur.
29
XTAL
A 12MHz (parallel resonant) crystal is connected between
this pin and ground.
30
+5V
POWER
OSC
/
CLOCK
+5V power for OSCILLATOR AND CLOCK POWER
DRIVER.
31
DSC OUT
-1000 1.2
-1000
1.2
1.2
LOW to HIGH transitions on this output during LOW TAKE
DATA cause receive cycle data shifting to occur.
32
RT ENABLE
-400
2.4
-400
4.0
4.0
A HIGH on this output indicates reception of a valid
COMMAND (or STATUS) word containing the terminalís
address. It also resets the FAIL SAFE.
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