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| 型號： | CH7008A-V |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Digital PC to TV Encoder Features |
| 中文描述： | 數(shù)字電視編碼器電腦功能 |
| 文件頁數(shù)： | 4/49頁 |
| 文件大?。?/td> | 341K |
| 代理商： | CH7008A-V |
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CHRONTEL
CH7008A
4
201-0000-027 Rev 2.2, 9/30/99
Table 1. Pin Descriptions
44-Pin
PLCC
1
44-Pin
TQFP
39
Type
Symbol
Description
In/Out
VREF
Reference Voltage Input
The VREF pin inputs a reference voltage of DVDD2/2. The signal is
derived externally through a resistor divider and decoupling capacitor,
and will be used as a reference level for data and sync inputs.
External Clock Inpu
t
This input along with XCLK* will form a differential clock input. For
applications where a differential clock is not available, the XCLK* pin
should be connected to the VREF pin.
External Clock Input*
See XCLK description
Horizontal Sync Input/Output
When the SYO bit is low, this pin accepts a horizontal sync input. The
level is 0 to DVDD2, with VREF as the threshold level.
2
40
In
XCLK
3
41
In
XCLK*
4
42
In/Out
H
When the SYO bit is high, the device will output a horizontal sync pulse.
The output is driven from the DVDD supply.
Vertical Sync Input/Output
When the SYO bit is low, this pin accepts a vertical sync input. The level
is 0 to DVDD2 with VREF as the threshold level.
5
43
In/Out
V
When the SYO bit is high, the device will output a vertical sync pulse.
The output is driven from the DVDD supply.
Data [0] through Data [11] Inputs
These pins accept 12 data inputs from the graphics controller. The level
is 0 to DVDD2, with VREF as the threshold level.
General Purpose Input/Output [0-1] and Internal
pull-up
These pins provide general purpose I/O’s controlled via the IIC bus,
registers 1Bh and 1Ch, bits 7 and 6. The internal pull-up is to the DVDD
supply.
Composite Sync Output
A 75
termination resistor with short traces should be attached
between CSYNC and ground for optimum performance. In SCART
mode, this pin outputs the composite sync signal.
Composite Video Output/Blue Output
A 75
termination resistor with short traces should be attached
between CVBS and ground for optimum performance. In normal
operating modes other than SCART, this pin outputs the composite
video signal. In SCART mode, this pin outputs the blue signal.
Chroma Output/Green Output
A 75
termination resistor with short traces should be attached
between C and ground for optimum performance.
In normal operating
modes other than SCART, this pin outputs the chroma video signal. In
SCART mode, this pin outputs the green signal.
Luma Output / Red Output
A 75
termination resistor with short traces should be attached
between Y and ground for optimum performance.
In normal operating
modes other than SCART, this pin outputs the luma video signal. In
SCART mode, this pin outputs the red signal.
Current Set Resistor Input
This pin sets the DAC current. A 360 ohm resistor should be
connected between this pin and GND using short and wide traces.
6-10,12-
13,15-19
44,1-4,6-
7,9-13
In
D[0]-D[11]
20-21
14-15
In/Out
GPIO[0]
GPIO[1]
23
17
Out
CSYNC
26
20
Out
CVBS/B
27
21
Out
C/G
28
22
Out
Y/R
30
24
In
ISET
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