參數(shù)資料
型號(hào)： CH7004C
廠商： Electronic Theatre Controls, Inc.
英文描述： Digital PC to TV Encoder with Macrovision
中文描述： 數(shù)碼電腦電視編碼器和通過(guò)Macrovision
文件頁(yè)數(shù)： 45/51頁(yè)
文件大小： 336K
代理商： CH7004C
CHRONTEL
CH7004C
201-0000-024 Rev 2.1, 8/2/99
45
Register Descriptions
(continued)
Address: 1BH
Bits: 8
Address: 1CH
Bits: 6
PLL Control Register
Symbol: PLLC
Address: 20H
Bits: 6
The following PLL and memory controls are available through the PLL control register:
MEM5V
MEM5V is set to 1 when the memory supply is 5 volts. The default value of 0 is used when the
memory supply is 3.3 volts.
PLL5VA
PLL5VA is set to 1 when the phase-locked loop analog supply is 5 volts (default). A value of 0 is
used when the phase-locked loop analog supply is 3.3 volts.
PLL5VD
PLL5VD is set to 1 when the phase-locked loop digital supply is 5 volts. A value of 0 is used when
the phase-locked loop digital supply is 3.3 volts (default).
PLLS
PLLS controls the number of stages used in the PLL. When the PLL5VA is 1 (5V analog PLL
supply) PLLS should be 1, and seven stages are used. When PLL5VA is 0 (3.3V analog PLL
supply) PLLS should be 0, and five stages are used.
PLLCAP
PLLCAP controls the loop filter capacitor of the PLL. A recommended listing of PLLCAP vs.
Mode is shown below
PLLCPI
PLLCHI controls the charge pump current of the PLL. The default value should be used.
Bit:
7
GPIOIN3
6
GPIOIN2
5
GPIOIN1
4
GPIOIN0
3
FSCI19
2
FSCI18
1
FSCI17
0
FSCI16
Symbol:
Type:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default:
0
0
0
0
0
0
0
0
Bit:
Symbol:
7
GOENB3
6
GOENB2
5
GOENB1
4
GOENB0
3
FSCI15
2
FSCI14
1
FSCI13
0
FSCI12
Type:
Default:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1
1
1
1
0
0
0
0
Bit:
Symbol:
7
6
5
PLLCPI
4
PLLCAP
3
PLLS
2
PLL5VD
1
PLL5VA
0
MEM5V
Type:
Default:
R/W
R/W
R/W
R/W
R/W
R/W
0
0
1
0
1
0
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