參數(shù)資料
型號(hào)： CH1005C
廠商： Electronic Theatre Controls, Inc.
英文描述： Digital PC to TV Encoder with Macrovision
中文描述： 數(shù)碼電腦電視編碼器和通過(guò)Macrovision
文件頁(yè)數(shù)： 12/49頁(yè)
文件大?。?/td> 338K
代理商： CH1005C
CHRONTEL
CH7005C
12
* Patent number 5,874,846
201-0000-025 Rev 2.1, 8/2/99
Functional Description
The CH7005 is a TV-output companion chip to graphics controllers providing digital output in either YUV or RGB
format. This solution involves both hardware and software elements which work together to produce an optimum
TV screen image based on the original computer generated pixel data. All essential circuitry for this conversion are
integrated onchip. Onchip circuitry includes memory, memory control, scaling, PLL, DAC, filters, and NTSC/PAL
encoder. All internal signal processing, including NTSC/PAL encoding, is performed using digital techniques to
ensure that the high-quality video signals are not affected by drift issues associated with analog components. No
additional adjustment is required during manufacturing.
CH7005 is ideal for PC motherboards, web browsers, or VGA add-in boards where a minimum of discrete support
components (passive components, parallel resonance 14.31818 MHz crystal) are required for full operation.
Architectural Overview
The CH7005 is a complete TV output subsystem which uses both hardware and software elements to produce an
image on TV which is virtually identical to the image that would be displayed on a monitor. Simply creating a
compatible TV output from a VGA input involves a relatively straightforward process. This process includes a
standard conversion from RGB to YUV color space, converting from a non-interlaced to an interlaced frame
sequence, and encoding the pixel stream into NTSC or PAL compliant format. However, creating an optimum
computer-generated image on a TV screen involves a highly sophisticated process of scaling, deflickering, and
filtering. This results in a compatible TV output that displays a sharp and subtle image, of the right size, with
minimal artifacts from the conversion process.
As a key part of the overall system solution, the CH7005 software establishes the correct framework for the VGA
input signal to enable this process. Once the display is set to a supported resolution (either 640x480 or 800x600),
the CH7005 software may be invoked to establish the appropriate TV output display. The software then programs
the various timing parameters of the VGA controller to create an output signal that will be compatible with the
chosen resolution, operating mode, and TV format. Adjustments performed in software include pixel clock rates,
total pixels per line, and total lines per frame. By performing these adjustments in software, the CH7005 can render
a superior TV image without the added cost of a full frame buffer memory – normally used to implement features
such as scaling and full synchronization.
The CH7005 hardware accepts digital RGB or YCrCb inputs, which are latched in synchronization with the pixel
clock. These inputs are then color-space converted into YUV in 4-2-2 format, and stored in a line buffer memory.
The stored pixels are fed into a block where scan-rate conversion, underscan scaling and 2-line, 3-line, 4-line and 5-
line vertical flicker filtering are performed. The scan-rate converter transforms the VGA horizontal scan-rate to
either NTSC or PAL scan rates; the vertical flicker filter eliminates flicker at the output while the underscan scaling
reduces the size of the displayed image to fit onto a TV screen. The resulting YUV signals are filtered through
digital filters to minimize aliasing problems. The digital encoder receives the filtered signals and transforms them to
composite and S-Video outputs, which are converted by the three 9-bit DACs into analog outputs.
Color Burst Generation*
The CH7005 allows the subcarrier frequency to be accurately generated from a 14.31818 MHz crystal oscillator,
leaving the subcarrier frequency independent of the sampling rate. As a result, the CH7005 may be used with any
VGA chip (with an appropriate digital interface) since the CH7005 subcarrier frequency can be generated without
being dependent on the precise pixel rates of VGA controllers. This feature is a significant benefit, since even a
±
0.01% subcarrier frequency variation may be enough to cause some television monitors to lose color lock.
In addition, the CH7005 has the capability to genlock the color burst signal to the VGA horizontal sync frequency,
which enables a fully synchronous system between the graphics controller and the television. When genlocked, the
CH7005 can also stop “dot crawl” motion (for composite mode operation in NTSC modes) to eliminate the
annoyance of moving borders. Both of these features are under programmable control through the register set.
Display Modes
The CH7005 display mode is controlled by three independent factors: input resolution, TV format, and scale factor,
which are programmed via the display mode register. It is designed to accept input resolutions of 640x480,
800x600, 640x400 (including 320x200 scan-doubled output), 720x400, and 512x384.
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