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參數(shù)資料
| 型號： | AT90USB82-16MUR |
| 廠商： | Atmel |
| 文件頁數(shù)： | 17/38頁 |
| 文件大?。?/td> | 0K |
| 描述： | MCU AVR USB 8K FLASH 32-QFN |
| 產(chǎn)品培訓模塊： | MCU Product Line Introduction megaAVR Introduction |
| 標準包裝： | 5,000 |
| 系列： | AVR® 90USB |
| 核心處理器： | AVR |
| 芯體尺寸： | 8-位 |
| 速度： | 16MHz |
| 連通性： | EBI/EMI，PS/2，SPI，UART/USART，USB |
| 外圍設備： | 欠壓檢測/復位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 22 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大小： | 512 x 8 |
| RAM 容量： | 512 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
| 配用： | ATSTK600-ND - DEV KIT FOR AVR/AVR32 ATSTK526-ND - KIT STARTER FOR AT90USB82/162 ATAVRDRAGON-ND - KIT DRAGON FLASH MEM AVR ATSTK525-ND - KIT STARTER FOR AT90USB AT90USBKEY2-ND - KIT DEMO FOR AT90USB |
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24
7707F–AVR–11/10
AT90USB82/162
be used. If a reset occurs while a write operation is in progress, the write operation will be com-
pleted provided that the power supply voltage is sufficient.
5.4
I/O Memory
The I/O space definition of the AT90USB82/162 is shown in “Register Summary” on page 288.
All AT90USB82/162 I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the
instruction set section for more details. When using the I/O specific commands IN and OUT, the
I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using
LD and ST instructions, 0x20 must be added to these addresses. The AT90USB82/162 is a
complex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 -
0x1FF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-
isters 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
5.4.1
General Purpose I/O Registers
The AT90USB82/162 contains three General Purpose I/O Registers. These registers can be
used for storing any information, and they are particularly useful for storing global variables and
Status Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
5.4.2
General Purpose I/O Register 2 – GPIOR2
5.4.3
General Purpose I/O Register 1 – GPIOR1
5.4.4
General Purpose I/O Register 0 – GPIOR0
Bit
765432
1
0
MSB
LSB
GPIOR2
Read/Write
R/W
Initial Value
000000
0
Bit
7654
3
2
1
0
MSB
LSB
GPIOR1
Read/Write
R/WR/W
Initial Value
0000
0
Bit
765432
1
0
MSB
LSB
GPIOR0
Read/Write
R/W
Initial Value
000000
0
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