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參數(shù)資料
| 型號： | ADUC843BSZ62-5 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 64/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT W/FLASH MCU 52-MQFP |
| 標準包裝： | 1 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 16.78MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設備： | DMA，PSM，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 62KB（62K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.75 V ~ 5.25 V |
| 數(shù)據(jù)轉換器： | A/D 8x12b |
| 振蕩器型： | 內部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 52-QFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 738 (CN2011-ZH PDF) |
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ADuC841/ADuC842/ADuC843
Rev. 0 | Page 67 of 88
Mode 3: 9-Bit UART with Variable Baud Rate
Mode 3 is selected by setting both SM0 and SM1. In this mode,
the 8051 UART serial port operates in 9-bit mode with a vari-
able baud rate determined by either Timer 1 or Timer 2. The
operation of the 9-bit UART is the same as for Mode 2, but the
baud rate can be varied as for Mode 1.
In all four modes, transmission is initiated by any instruction
that uses SBUF as a destination register. Reception is initiated in
Mode 0 by the condition RI = 0 and REN = 1. Reception is
initiated in the other modes by the incoming start bit if REN = 1.
UART Serial Port Baud Rate Generation
Mode 0 Baud Rate Generation
The baud rate in Mode 0 is fixed.
Mode 0 Baud Rate = (Core Clock Frequency/12)
Mode 2 Baud Rate Generation
The baud rate in Mode 2 depends on the value of the SMOD bit
in the PCON SFR. If SMOD = 0, the baud rate is 1/32 of the
core clock. If SMOD = 1, the baud rate is 1/16 of the core clock:
Mode 2 Baud Rate = (2SMOD/32 × [Core Clock Frequency])
Modes 1 and 3 Baud Rate Generation
The baud rates in Modes 1 and 3 are determined by the over-
flow rate in Timer 1 or Timer 2, or in both (one for transmit
and the other for receive).
Timer 1 Generated Baud Rates
When Timer 1 is used as the baud rate generator, the baud rates
in Modes 1 and 3 are determined by the Timer 1 overflow rate
and the value of SMOD as follows:
Modes 1 and 3 Baud Rate = (2SMOD/32 × (Timer 1 Overflow Rate)
The Timer 1 interrupt should be disabled in this application.
The timer itself can be configured for either timer or counter
operation, and in any of its three running modes. In the most
typical application, it is configured for timer operation in the
autoreload mode (high nibble of TMOD = 0010 binary). In that
case, the baud rate is given by the formula
Modes 1 and 3 Baud Rate =
(2SMOD/32) × (Core Clock/ [256 TH1])
Timer 2 Generated Baud Rates
Baud rates can also be generated using Timer 2. Using Timer 2
is similar to using Timer 1 in that the timer must overflow 16
times before a bit is transmitted/received. Because Timer 2 has a
16-bit autoreload mode, a wider range of baud rates is possible
using Timer 2.
Modes 1 and 2 Baud Rate = (1/16) × (Timer 2 Overflow Rate)
Therefore, when Timer 2 is used to generate baud rates, the
timer increments every two clock cycles rather than every core
machine cycle as before. Thus, it increments six times faster
than Timer 1, and therefore baud rates six times faster are possi-
ble. Because Timer 2 has 16-bit autoreload capability, very low
baud rates are still possible.
Timer 2 is selected as the baud rate generator by setting the
TCLK and/or RCLK in T2CON. The baud rates for transmit
and receive can be simultaneously different. Setting RCLK and/
or TCLK puts Timer 2 into its baud rate generator mode as
shown in Figure 73.
In this case, the baud rate is given by the formula
Modes 1 and 3 Baud Rate =
(Core Clock)/(16 × [65536 (RCAP 2H, RCAP 2L)])
CORE
CLK*
T2
PIN
TR2
CONTROL
TL2
(8 BITS)
TH2
(8 BITS)
RELOAD
EXEN2
CONTROL
T2EX
PIN
TRANSITION
DETECTOR
EXF 2
TIMER 2
INTERRUPT
NOTE: AVAILABILITY OF ADDITIONAL
EXTERNAL INTERRUPT
RCAP2L
RCAP2H
TIMER 2
OVERFLOW
2
16
RCLK
TCLK
RX
CLOCK
TX
CLOCK
0
1
0
SMOD
TIMER 1
OVERFLOW
C/ T2 = 0
C/ T2 = 1
*CORE CLK IS DEFINED BY THE CD BITS IN PLLCON
03260-
0-
073
Figure 73. Timer 2, UART Baud Rates
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