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參數(shù)資料
| 型號： | ADSP-2196MBST-140X |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | 16-BIT, 160 MHz, OTHER DSP, PQFP144 |
| 封裝： | METRIC, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 4/68頁 |
| 文件大?。?/td> | 897K |
| 代理商： | ADSP-2196MBST-140X |
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For current information contact Analog Devices at 800/262-5643
ADSP-2196
September 2001
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
4
REV. PrA
General Note
This data sheet provides preliminary information for the
ADSP-2196 Digital Signal Processor.
GENERAL DESCRIPTION
The ADSP-2196 DSP is a single-chip microcomputer
optimized for digital signal processing (DSP) and other high
speed numeric processing applications.
The ADSP-2196 combines the ADSP-219x family base
architecture (three computational units, two data address
generators, and a program sequencer) with three serial
ports, two SPI-compatible ports, one UART port, a DMA
controller, three programmable timers, general-purpose
Programmable Flag pins, extensive interrupt capabilities,
and on-chip program and data memory spaces.
The ADSP-2196 architecture is code-compatible with
ADSP-218x family DSPs. Although the architectures are
compatible, the ADSP-2196 architecture has a number of
enhancements over the ADSP-218x architecture. The
enhancements to computational units, data address gener-
ators, and program sequencer make the ADSP-2196 more
flexible and even easier to program than the
ADSP-218x DSPs.
Indirect addressing options provide addressing flexibility—
premodify with no update, pre- and post-modify by an
immediate 8-bit, two’s-complement value and base address
registers for easier implementation of circular buffering.
The ADSP-2196 integrates 32K words of on-chip memory
configured as 8K words (24-bit) of program RAM, 8K
words (16-bit) of data RAM, and 16K words (24-bit) of
program ROM. Power-down circuitry is also provided to
meet the low power needs of battery-operated portable
equipment. The ADSP-2196 is available in 144-lead LQFP
and mini-BGA packages.
Fabricated in a high-speed, low-power, CMOS process, the
ADSP-2196 operates with a 6.25 ns instruction cycle time
(160 MIPS). All instructions, except two multiword
instructions, can execute in a single DSP cycle.
The ADSP-2196’s flexible architecture and comprehensive
instruction set support multiple operations in parallel. For
example, in one processor cycle, the ADSP-2196 can:
Generate an address for the next instruction fetch
Fetch the next instruction
Perform one or two data moves
Update one or two data address pointers
Perform a computational operation
These operations take place while the processor
continues to:
Receive and transmit data through two serial ports
Receive and/or transmit data from a Host
Receive or transmit data through the UART
Receive or transmit data over two SPI ports
Access external memory through the external memory
interface
Decrement the timers
DSP Core Architecture
The ADSP-2196 instruction set provides flexible data
moves and multifunction (one or two data moves with a
computation) instructions. Every single-word instruction
can be executed in a single processor cycle. The ADSP-2196
assembly language uses an algebraic syntax for ease of
coding and readability. A comprehensive set of development
tools supports program development.
The functional block diagram
on page 1
shows the architec-
ture of the ADSP-219x core. It contains three independent
computational units: the ALU, the multiplier/accumulator
(MAC), and the shifter. The computational units process
16-bit data from the register file and have provisions to
support multiprecision computations. The ALU performs
a standard set of arithmetic and logic operations; division
primitives are also supported. The MAC performs sin-
gle-cycle multiply, multiply/add, and multiply/subtract
operations. The MAC has two 40-bit accumulators, which
help with overflow. The shifter performs logical and arith-
metic shifts, normalization, denormalization, and derive
exponent operations. The shifter can be used to efficiently
implement numeric format control, including multiword
and block floating-point representations.
Register-usage rules influence placement of input and
results within the computational units. For most operations,
the computational units’ data registers act as a data register
file, permitting any input or result register to provide input
to any unit for a computation. For feedback operations, the
computational units let the output (result) of any unit be
input to any unit on the next cycle. For conditional or mul-
tifunction instructions, there are restrictions on which data
registers may provide inputs or receive results from each
computational unit. For more information, see the
ADSP-219x DSP Instruction Set Reference
.
A powerful program sequencer controls the flow of instruc-
tion execution. The sequencer supports conditional jumps,
subroutine calls, and low interrupt overhead. With internal
loop counters and loop stacks, the ADSP-2196 executes
looped code with zero overhead; no explicit jump instruc-
tions are required to maintain loops.
Two data address generators (DAGs) provide addresses for
simultaneous dual operand fetches (from data memory and
program memory). Each DAG maintains and updates four
16-bit address pointers. Whenever the pointer is used to
access data (indirect addressing), it is pre- or post-modified
by the value of one of four possible modify registers. A length
value and base address may be associated with each pointer
to implement automatic modulo addressing for circular
buffers. Page registers in the DAGs allow circular addressing
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADSP-2196MKCA-160X | DSP Microcomputer |
| ADSP-2196MKST-160X | DSP Microcomputer |
| ADSP-21990 | 16-bit fixed point DSP with Flash |
| ADSP-21990BBC | 16-bit fixed point DSP with Flash |
| ADSP-21990BST | 16-bit fixed point DSP with Flash |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-2196MBST-140Z | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 140MHz 140MIPS 144-Pin LQFP |
| ADSP-2196MKST-160 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 160MHz 160MIPS 144-Pin LQFP 制造商:Analog Devices 功能描述:16-Bit DSP 160 MIPs 2.5V 40 Kbytes |
| ADSP-2196MKSTZ-160 | 功能描述:IC DSP CONTROLLER 16BIT 144-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:ADSP-21xx 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-21990BBC | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 150MHz 150MIPS 196-Pin Mini-BGA 制造商:Rochester Electronics LLC 功能描述:160 MIPS, MIXED SIGNAL DSPWITH 14-BIT - Bulk |
| ADSP-21990BST | 制造商:Rochester Electronics LLC 功能描述:160 MIPS,MIXED SIGNAL DSP WITH 14BIT - Tape and Reel |
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