SLAS631A – APRIL 2009 – REVISED JULY 2009" />
參數(shù)資料
型號(hào): ADS62C17IRGCT
廠(chǎng)商: Texas Instruments
文件頁(yè)數(shù): 54/68頁(yè)
文件大?。?/td> 0K
描述: IC ADC 11BIT DUAL 200MSPS 64VQFN
標(biāo)準(zhǔn)包裝: 1
位數(shù): 11
采樣率(每秒): 200M
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 1.1W
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 64-VQFN 裸露焊盤(pán)(9x9)
包裝: 標(biāo)準(zhǔn)包裝
輸入數(shù)目和類(lèi)型: 2 個(gè)差分,單極
產(chǎn)品目錄頁(yè)面: 888 (CN2011-ZH PDF)
其它名稱(chēng): 296-24232-6
Output Data Format
BOARD DESIGN CONSIDERATIONS
MIGRATION FROM ADS62C15 TO ADS62C17
SLAS631A – APRIL 2009 – REVISED JULY 2009 ............................................................................................................................................................. www.ti.com
Two output data formats are supported – 2s complement and offset binary. They can be selected using the serial
interface register bit <DATA FORMAT> or controlling the DFS pin in parallel configuration mode.
In the event of an input voltage overdrive, the digital outputs go to the appropriate full scale level. For a positive
overdrive, the output code is 0x7FF in offset binary output format, and 0x3FF in 2s complement output format.
For a negative input overdrive, the output code is 0x000 in offset binary output format and 0x400 in 2s
complement output format.
Grounding
A single ground plane is sufficient to give good performance, provided the analog, digital, and clock sections of
the board are cleanly partitioned. See the EVM User Guide (SLAU237A) for details on layout and grounding.
Supply Decoupling
As ADS62C17 already includes internal decoupling, minimal external decoupling can be used without loss in
performance. Note that decoupling capacitors can help filter external power supply noise, so the optimum
number of capacitors would depend on the actual application. The decoupling capacitors should be placed very
close to the converter supply pins.
Exposed Pad
In addition to providing a path for heat dissipation, the pad is also electrically connected to digital ground
internally. So, it is necessary to solder the exposed pad to the ground plane for best thermal and electrical
performance. For detailed information, see application notes QFN Layout Guidelines (SLOA122) and QFN/SON.
PCB Attachment (SLUA271).
While migrating from the C15 to C17, note the following differences between the two devices.
ADS62C15
ADS62C17
Pinout
Pin 22 is AGND
Pin 22 is NC
Pin 64 is DRGND
Pin 64 is SDOUT (Serial readout pin)
Supply
AVDD is 3.3V
No change
DRVDD is 1.8V to 3.3V (for CMOS interface) and is
DRVDD is 1.8V (for both CMOS and LVDS
3.3V (for LVDS interface)
interfaces)
Serial Interface
Protocol: 8 bit register address & 8 bit register data
No change in protocol
Serial register map is completely different
58
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): ADS62C17
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