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參數(shù)資料
型號： ADS62C17IRGCT
廠商： Texas Instruments
文件頁數(shù)： 14/68頁
文件大?。?/td> 0K
描述： IC ADC 11BIT DUAL 200MSPS 64VQFN
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 11
采樣率（每秒）： 200M
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 1.1W
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-VQFN 裸露焊盤（9x9）
包裝： 標(biāo)準(zhǔn)包裝
輸入數(shù)目和類型： 2 個差分，單極
產(chǎn)品目錄頁面： 888 (CN2011-ZH PDF)
其它名稱： 296-24232-6
www.ti.com ............................................................................................................................................................. SLAS631A – APRIL 2009 – REVISED JULY 2009
A7 – A0 IN HEX
D7
D6
D5
D4
D3
D2
D1
D0
44
<CLKOUT EDGE CONTROL>
0
Output clock edge control
LVDS Interface
D7-D5
<CLKOUT POSN> Output clock rising edge position
000, 100 Default output clock position (refer to timing specification table)
101 Rising edge shifted by + (4/26)Ts
110 Rising edge aligned with data transition
111 Rising edge shifted by – (4/26)Ts
D4-D2
<CLKOUT POSN> Output clock falling edge position
000, 100 Default output clock position (refer to timing specification table)
101 Falling edge shifted by + (4/26)Ts
110 Falling edge aligned with data transition
111 Falling edge shifted by – (4/26)Ts
CMOS INterface
D7-D5
<CLKOUT POSN> Output clock rising edge position
000, 100 Default output clock position (refer to timing specification table)
101 Rising edge shifted by + (4/26)Ts
110 Rising edge shifted by – (6/26)Ts
111 Rising edge shifted by – (4/26)Ts
D4-D2
<CLKOUT POSN> Output clock falling edge position
000, 100 Default output clock position (refer to timing specification table)
101 Falling edge shifted by + (4/26)Ts
110 Falling edge shifted by – (6/26)Ts
111 Falling edge shifted by – (4/26)Ts
A7 – A0 IN HEX
D7
D6
D5
D4
D3
D2
D1
D0
50
0
<ENABLE INDEPENDENT
0
<DATA FORMAT>
0
CHANNEL CONTROL>
2s complement or offset binary 0
D6
<ENABLE INDEPENDENT CHANNEL CONTROL>
0 Common control – both channels use common control settings for test patterns, offset correction,
gain, gain correction and SNRBoost functions. These settings can be specified in a single set of
registers.
1 Independent control – both channels can be programmed with independent control settings for test
patterns, offset correction and SNRBoost functions. Separate registers are available for each
channel.
D2-D1
<DATA FORMAT>
10 2s complement
11 Offset binary
Copyright 2009, Texas Instruments Incorporated
21
Product Folder Link(s): ADS62C17
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參數(shù)描述
ADS62P15 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 11-Bits, 125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs
ADS62P15_09 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 11-Bits,125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs
ADS62P15_1 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 11-Bits,125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs
ADS62P15EVM 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 ADS62P15 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
ADS62P15IRGC25 功能描述:模數(shù)轉(zhuǎn)換器 - ADC DualChannel 11Bs 125MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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