參數(shù)資料
型號(hào)： ADS5270
英文描述： 8-Channel, 12-Bit, 40MSPS ADC with Serial LVDS Interface
中文描述： 8通道，12位，40MSPS的ADC的串行LVDS接口
文件頁(yè)數(shù)： 3/18頁(yè)
文件大?。?/td> 439K
代理商： ADS5270
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SBAS293D JANUARY 2004 REVISED MAY 2004
www.ti.com
3
ELECTRICAL CHARACTERISTICS
TMIN = 40
°
C, and TMAX = +85
°
C. Typical values are at TA = 25
°
C, clock frequency = maximum specified, 50% clock duty cycle, AVDD = 3.3V,
LVDD = 3.3V, 1dBFS, internal voltage reference, and LVDS buffer current at 3.5mA per channel, unless otherwise noted.
ADS5270
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY
No Missing Codes
Differential Nonlinearity
Integral Nonlinearity
Offset Error
(1)
Offset Temperature Coefficient
Fixed Attenuation in Channel
(2)
Variable Attenuation in Channel
(3)
Gain Error
(4)
Gain Temperature Coefficient
(5)
Assured
±
0.5
±
0.6
±
0.2
14
1
±
0.2
±
1.0
44
DNL
INL
f
IN
= 5MHz
f
IN
= 5MHz
0.9
2.0
0.75
0.9
2.0
0.75
LSB
LSB
%FS
ppm/
°
C
%FS
%FS
%FS
ppm/
°
C
REF
T
REF
B
2.5
2.5
POWER SUPPLY
I
CC
Total Supply Current
Analog Supply Current
Digital Output Driver Supply Current
Power Dissipation
Power Down
V
IN
= FS, F
IN
= 5MHz
V
IN
= FS, F
IN
= 5MHz
275
221
54
904
90
mA
mA
mA
mW
mW
I(AVDD)
I(LVDD)
V
IN
= FS, F
IN
= 5MHz, LVDS Into 100
Load
950
Clock Running
REFERENCE VOLTAGES
VREF
T
VREF
B
V
CM
Reference Top (internal)
Reference Bottom (internal)
Common-Mode Voltage
V
CM
Output Current
(6)
Reference Top (external)
Reference Bottom (external)
External Reference Input Current
(7)
1.95
0.95
1.45
2.0
1.0
1.5
±
2
2.05
1.05
1.55
V
V
V
±
50mV Change in Voltage
mA
V
V
mA
VREF
T
VREF
B
1.875
1.125
2.0
ANALOG INPUT
Differential Input Capacitance
Analog Input Common-Mode Range
Differential Input Voltage Range
7.0
pF
V
V
PP
V
CM
±
0.05
2.02
1.5
Voltage Overload Recovery Time
Differential Input Signal at 4V
PP
Recovery to Within 1% of Code
3dBFS
4.0
CLK Cycles
Input Bandwidth
300
MHz
DIGITAL DATA OUTPUTS
Data Bit Rate
240
480
MBPS
SERIAL INTERFACE
SCLK
V
IN
LOW
V
IN
HIGH
Serial Clock Input Frequency
Input Low Voltage
Input High Voltage
Input Current
Input Pin Capacitance
20
0.6
VDD
MHz
V
V
μ
A
pF
0
2.1
±
10
5.0
(1)
(2)
Offset error is the deviation of the average code from mid-code for a zero input. Offset error is expressed in terms of % of full scale.
Fixed attenuation in the channel arises due to a fixed attenuation of about 1% in the sample-and-hold amplifier. When the differential voltage at the analog input pins are
changed from V
REF
to +V
REF
, the swing of the output code is expected to deviate from the full-scale code (4096LSB) by the extent of this fixed attenuation.
NOTE: V
REF
is defined as (REF
T
REF
B
).
Variable attenuation in the channel refers to the attenuation of the signal in the channel over and above the fixed attenuation.
The reference voltages are trimmed at production so that (VREF
T
VREF
B
) is within
±
25mV of the ideal value of 1V. It does not include fixed attenuation.
The gain temperature coefficient refers to the temperature coefficient of the attenuation in the channel. It does not account for the variation of the reference voltages with
temperature.
V
CM
provides the common-mode current for the inputs of all eight channels when the inputs are AC-coupled. The V
CM
output current specified is the additional drive of
the V
CM
buffer if loaded externally.
Average current drawn from the reference pins in the external reference mode.
(3)
(4)
(5)
(6)
(7)
相關(guān)PDF資料
PDF描述
ADS5270IPFP 8-Channel, 12-Bit, 40MSPS ADC with Serial LVDS Interface
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