參數(shù)資料
型號(hào): ADS1259IPW
廠商: Texas Instruments
文件頁(yè)數(shù): 27/48頁(yè)
文件大?。?/td> 0K
描述: IC ADC 24BIT 14KSPS LN 20TSSOP
產(chǎn)品培訓(xùn)模塊: Industrial Automation Overview
標(biāo)準(zhǔn)包裝: 70
位數(shù): 24
采樣率(每秒): 14k
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
輸入數(shù)目和類型: 2 個(gè)單端,單極;2 個(gè)單端,雙極;1 個(gè)差分,單極;1 個(gè)差分,雙極
其它名稱: 296-27184-5
1
9
17
25
CS
(1)
SCLK
DIN
OPCODE1
OPCODE2
DOUT
REGDATA
REGDATA+1
SBAS424D
– JUNE 2009 – REVISED AUGUST 2011
RDATA: Read Data
Description: Issue this command opcode after DRDY goes low to read the conversion result (in Stop Read Data
Continuous mode). See the Read Data Mode section for more details.
RREG: Read from Registers
Description: These opcode bytes read register data. The Register Read command is a two-byte opcode
followed by the output of the register data. The first byte contains the command opcode and the register address.
The second byte of the opcode specifies the number of registers to read
– 1.
First opcode byte: 0010 rrrr, where rrrr is the starting register address.
Second opcode byte: 0000 nnnn, where nnnn is the number of registers to read.
The 17th SCLK rising edge of the operation clocks out the MSB of the first register.
(1) CS may be tied low.
Figure 62. RREG Command Example: Read Two Registers Starting from Register 00h (CONFIG0)
(OPCODE 1 = 0010 0000, OPCODE 2 = 0000 0001)
Copyright
2009–2011, Texas Instruments Incorporated
33
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