參數(shù)資料
型號(hào): ADS1191IPBSR
廠商: Texas Instruments
文件頁(yè)數(shù): 6/67頁(yè)
文件大小: 0K
描述: IC AFE 16BIT 8KSPS 1CH 32TQFP
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 16
通道數(shù): 1
電壓 - 電源,模擬: 2.7 V ~ 5.25 V
電壓 - 電源,數(shù)字: 1.7 V ~ 3.6 V
封裝/外殼: 32-TQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(5x5)
包裝: 帶卷 (TR)
SBAS566A – DECEMBER 2011 – REVISED SEPTEMBER 2012
THEORY OF OPERATION
This section contains details of the ADS1191/2 internal functional elements. The analog blocks are discussed
first followed by the digital interface. Blocks implementing ECG-specific functions are covered in the end.
Throughout this document, fCLK denotes the frequency of the signal at the CLK pin, tCLK denotes the period of the
signal at the CLK pin, fDR denotes the output data rate, tDR denotes the time period of the output data, and fMOD
denotes the frequency at which the modulator samples the input.
EMI FILTER
An RC filter at the input acts as an EMI filter on channels 1 and 2. The –3-dB filter bandwidth is approximately
3 MHz.
INPUT MULTIPLEXER
The ADS1191/2 input multiplexers are very flexible and provide many configurable signal switching options.
Refer to Figure 14 for a diagram of the ADS1191/2 multiplexer. Note that IN3P, IN3N, and RLDIN are common to
both channels. VINP and VINN are separate for each of the three pins. This flexibility allows for significant device
and sub-system diagnostics, calibration, and configuration. Selection of switch settings for each channel is made
by writing the appropriate values to the CH1SET or CH2SET register (see the CH1SET and CH2SET Registers
in the Register Map section for details.) More details of the ECG-specific features of the multiplexer are
discussed in the Input Multiplexer subsection of the ECG-Specifc Functions.
Device Noise Measurements
Setting CHnSET[3:0] = 0001 sets the common-mode voltage of (VREFP + VREFN)/2 to both inputs of the
channel. This setting can be used to test the inherent noise of the device in the user system.
Test Signals (TestP and TestN)
Setting CHnSET[2:0] = 101 provides internally-generated test signals for use in sub-system verification at power-
up. This functionality allows the entire signal chain to be tested out. Although the test signals are similar to the
CAL signals described in the IEC60601-2-51 specification, this feature is not intended for use in compliance
testing.
Control of the test signals is accomplished through register settings (see the CONFIG2: Configuration Register 2
subsection in the Register Map section for details). TEST_AMP controls the signal amplitude and TEST_FREQ
controls switching at the required frequency.
14
Copyright 2011–2012, Texas Instruments Incorporated
Product Folder Links: ADS1191 ADS1192
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