參數(shù)資料
型號： ADE7169ASTF16
廠商： ANALOG DEVICES INC
元件分類： 模擬信號調(diào)理
英文描述： Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
中文描述： ANALOG CIRCUIT, PQFP64
封裝： MS-026BCD, LQFP-64
文件頁數(shù)： 31/140頁
文件大?。?/td> 1359K
代理商： ADE7169ASTF16
Preliminary Technical Data
ADE7169F16
OPERATING MODES
PSM0 (NORMAL MODE)
In PSM0, normal operating mode, V
SW
is connected to V
DD
. All
of the analog and digital circuitries powered by V
INTD
and V
INTA
are enabled by default. The default clock frequency for PSM0,
F
core
, established during a power-on-reset or software reset, is
TBD MHz.
Rev. PrD | Page 31 of 140
PSM1 (BATTERY MODE)
In PSM1, V
SW
is connected to V
BAT
. In this operating mode, the
8052 core and all of the digital circuitry are enabled by default.
The analog circuitry for the ADE energy metering DSP
powered by V
INTA
is disabled. This analog circuitry will
automatically start up again once the V
DD
supply is above TBD
V if the PWRDN bit in the MODE1 register (0x0B) is cleared.
The default F
core
for PSM1, established during a power-on-reset
or software reset, is 1.024 MHz.
PSM2 (SLEEP MODE)
PSM2 is a low power consumption sleep mode for use in battery
operation. In this mode, V
SW
is connected to V
BAT
. All of the
2.5V digital and analog circuitry powered through V
INTA
and
V
INTD
is disabled, including the MCU core, resulting in the
following:
1.
The RAM in the MCU is no longer valid.
2.
The program counter for the 8052, also held in volatile
memory, becomes invalid when the 2.5V supply is shut
down. Therefore, the program will not resume from where
it left off but will always start from the power on reset
vector when the ADE7169F16 comes out of PSM2.
The 3.3V peripherals Temperature ADC, V
BAT
ADC, V
SW
ADC,
RTC and LCD are active in PSM2. They can be enabled or
disabled to reduce power consumption and are configured for
PSM2 operation when the MCU core is active—see the
individual peripherals for more information on their PSM2
configuration. The ADE7169F16 remains in PSM2 until an
event occurs to wake it up.
In PSM2, the ADE7169F16 provides 4 scratch pad RAM SFR
that are maintained during this mode. These SFRs can be used
to save data from PSM0 or PSM1 modes when entering PSM2
modes - see Table 16 to Table 20.
In PSM2, the ADE7169F16 maintains some SFRs – see Table
23. The SFRs that are not listed in this table should be restored
when the part enters PSM0 or PSM1 frm PSM2 mode.
Table 23. SFR maintained in PSM2
I/O configuration
Power Supply monitoring
Interrupt pins configuration SFR
(INTPR, 0xFF)
Peripheral Configuration SFR
(PERIPH, 0xF4)
Port 0 Weak pull-up enable SFR
(PINMAP0, 0xB2)
Port 1 Weak pull-up enable SFR
(PINMAP1, 0xB3)
Port 2 Weak pull-up enable SFR
(PINMAP2, 0xB4)
Scratch Pad 1 SFR (SCRATCH1,
0xFB)
Scratch Pad 2 SFR (SCRATCH2,
0xFC)
Scratch Pad 3 SFR (SCRATCH3,
0xFD)
Scratch Pad 4 SFR (SCRATCH4,
0xFE)
Battery detection threshold SFR
(BATVTH, 0xFA)
Battery Switchover
Configuration SFR (BATPR,
0xF5)
Battery ADC value SFR
(BATADC, 0xDF)
Peripheral ADC Strobe Period
SFR (STRBPER, 0xF9)
Temperature and Supply Delta
SFR (DIFFPROG, 0xF3)
VSW ADC value SFR
(VSWADC, 0xEF)
Temperature ADC value SFR
(TEMPADC, 0xD7)
Peripherals – RTC
Peripherals - LCD
RTC Nominal Compensation
SFR (RTCCOMP, 0xF6)
RTC Temperature
Compensation SFR (TEMPCAL,
0xF7)
RTC Configuration SFR
(TIMECON, 0xA1)
Hundredths of a Second
Counter SFR (HTHSEC, 0xA2)
Seconds Counter SFR (SEC,
0xA3)
Minutes Counter SFR (MIN,
0xA4)
Hours Counter SFR (HOUR,
0xA5)
Alarm Interval SFR (INTVAL,
0xA6)
LCD Segment Enable 2 SFR
(LCDSEGE2, 0xED)
LCD Configuration Y SFR
(LCDCONY, 0xB1)
LCD Configuration X SFR
(LCDCONX, 0x9C)
LCD Configuration SFR
(LCDCON, 0x95)
LCD Clock SFR (LCDCLK,
0x96)
LCD Segment Enable SFR
(LCDSEGE, 0x97)
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