參數(shù)資料
型號(hào)： ADE7169ASTF16
廠商： ANALOG DEVICES INC
元件分類： 模擬信號(hào)調(diào)理
英文描述： Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
中文描述： ANALOG CIRCUIT, PQFP64
封裝： MS-026BCD, LQFP-64
文件頁(yè)數(shù)： 124/140頁(yè)
文件大小： 1359K
代理商： ADE7169ASTF16
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)當(dāng)前第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)
ADE7169F16
Preliminary Technical Data
Rev. PrD | Page 124 of 140
When this bit is set to logic one, the SS pin is defined as the Slave Select input pin
for the SPI slave interface
Receive buffer overflow write enable
0
If the SPIRX SFR has not been read when a new data byte is
received, the new byte will be discarded.
1
If the SPIRX SFR has not been read when a new data byte is
received, the new byte will overwrite the old data.
Master Mode: SPI SCLK frequency
[1:0]
00
F
core
/ 8 = 512kHz if F
core
= 4.096MHz
01
F
core
/ 16 = 256kHz if F
core
= 4.096MHz
10
F
core
/ 32 = 128kHz if F
core
= 4.096MHz
11
F
core
/ 64 = 64kHz if F
core
= 4.096MHz
0xEA
2
RxOFW
0
1-0
0xE9 –
0xE8
SPIR[1:0]
0
Table 125. SPI Configuration Register SFR (SPIMOD2, 0xE9)
Bit
Location
Mnemonic
7
SPICONT
Bit
Default
Value
Description
Master Mode: SPI continuous transfer mode enable bit
0
The SPI interface will stop after one byte is transferred and SS will
be deasserted. A new data transfer can be intiated after a stalled
period.
1
The SPI interface will continue transferring data until no valid data is
availbale in the SPITx SFR. SS will remain asserted until SPITx SFR
and the transmit shift register is empty.
SPI interface enable bit
0
The SPI interface is disabled.
1
The SPI interface is enabled
SPI Open Drain Outputs configuration bit
0
Internal pull-up resistors are connected to the SPI outputs
0
6
SPIEN
0
5
SPIODO
0
1
The SPI outputs are open-drain and need external pull-up resistors
SPI Master Mode enable bit
0
The SPI interface is defined as a Slave
4
SPIMS_b
0
1
The SPI interface is defined as a Master
SPI clock polarity configuration bit – see Figure 84.
0
The default state of SCLK is low and the first SCLK edge is rising.
Depending on SPICPHA bit, the SPI data output changes state on
the falling or rising edge of SCLK while the SPI data input is sampled
on the rising or falling edge of SCLK.
The default state of SCLK is high and the first SCLK edge is falling.
Depending on SPICPHA bit, the SPI data output changes state on
the rising or falling edge of SCLK while the SPI data input is sampled
on the falling or rising edge of SCLK.
SPI clock phase configuration bit – see Figure 84.
0
The SPI data output changes state when SS goes low, at the second
edge of SCLK and then every two subsequent edges while the SPI
data input is sampled at the first SCLK edge and then every two
subsequent edges.
1
The SPI data output changes state at the first edge of SCLK and then
every two subsequent edges while the SPI data input is sampled at
the second SCLK edge and then every two subsequent edges.
Master Mode: LSB first configuration bit
3
SPICPOL
0
1
2
SPICPHA
0
1
SPILSBF
0
相關(guān)PDF資料
PDF描述
ADE7169ASTF16-RL Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169ASTZF16 Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169ASTZF16-RL Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169F16 Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7751 Energy Metering IC with On-Chip Fault Detection
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADE7169ASTF16-RL 制造商:AD 制造商全稱:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169ASTZF16 功能描述:IC ENERGY METER 1PHASE 64LQFP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測(cè)量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:*
ADE7169ASTZF16-RL 功能描述:IC ENERGY METER 1PHASE 64LQFP RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測(cè)量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:*
ADE7169F16 制造商:AD 制造商全稱:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE75 制造商:AD 制造商全稱:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*