參數(shù)資料
型號: ADC1215S105HN
廠商: NXP Semiconductors N.V.
元件分類: 外設及接口
英文描述: Single 12-bit ADC 105 Msps with Input Buffer CMOS or LVDS DDR digital outputs
封裝: ADC1215S105HN/C1<SOT618-6 (HVQFN40)|<<http://www.nxp.com/packages/SOT618-6.html<1<Always Pb-free,;ADC1215S105HN/C1<SOT618-6 (HVQFN40)|<<http://www.nxp.com/packages/SOT618
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代理商: ADC1215S105HN
ADC1215S_SER
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NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 13 January 2011
32 of 42
NXP Semiconductors
ADC1215S series
Single 12-bit ADC; input buffer; CMOS or LVDS DDR digital output
Table 19.
Default values are highlighted.
Bit
Symbol
7
SW_RST
Reset and operating mode control register (address 0005h) bit description
Access
R/W
Value
Description
reset digital section
no reset
performs a reset on SPI registers
reserved
not used
operating mode
normal (Power-up)
Power-down
Sleep
normal (Power-up)
0
1
000
00
6 to 4
3 to 2
1 to 0
RESERVED[2:0]
-
OP_MODE[1:0]
R/W
00
01
10
11
Table 20.
Default values are highlighted.
Bit
Symbol
7 to 5
-
4
SE_SEL
Clock control register (address 0006h) bit description
Access
Value
000
Description
not used
single-ended clock input pin select
CLKM
CLKP
R/W
0
1
3
DIFF_SE
R/W
differential/single ended clock input select
fully differential
single-ended
not used
clock input divide by 2
disabled
enabled
duty cycle stabilizer
disabled
enabled
0
1
0
2
1
-
CLKDIV
R/W
0
1
0
DCS_EN
R/W
0
1
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相關代理商/技術參數(shù)
參數(shù)描述
ADC1215S105HN/C1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS DDR digital outputs
ADC1215S105HN/C1,5 功能描述:模數(shù)轉換器 - ADC SGL 12BT ADC 105MSPS IN BUF CMOS/LVDS DDR RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1215S105HN-C1 制造商:Integrated Device Technology Inc 功能描述:HVQFN40 - Bulk
ADC1215S105HN-C18 制造商:Integrated Device Technology Inc 功能描述:HVQFN40 - Tape and Reel