參數(shù)資料
型號(hào): AD9981KSTZ-95
廠商: ANALOG DEVICES INC
元件分類: 其它接口
英文描述: High Performance 10-Bit Display Interface
中文描述: SPECIALTY INTERFACE CIRCUIT, PQFP80
封裝: LEAD FREE, MS-026BEC, LQFP-80
文件頁數(shù): 35/44頁
文件大小: 506K
代理商: AD9981KSTZ-95
AD9981
Table 43. Input Bandwidth Select
Input Bandwidth
0
1
Rev. 0 | Page 35 of 44
Result
Low analog input bandwidth
High analog input bandwidth
0x1E
4
Power-Down Control Select
This bit determines whether power-down is con-
trolled manually or automatically by the chip. If
automatic control is selected (Register 0x1E, Bit 4), the
AD9981’s decision is based on the status of the sync
detect bits (Register 0x24, Bits 2, 3, 6, and 7). If either
an Hsync or a sync-on-green input is detected on any
input, the chip powers up or powers down. For
manual control, the AD9981 allows the flexibility of
control through both a dedicated pin and a register bit.
The dedicated pin allows a hardware watchdog circuit
to control power-down, while the register bit allows
power-down to be controlled by software. With
manual power-down control, the polarity of the
powerdown pin must be set (0x1E, Bit 2) whether it is
used or not. If unused, it is recommended to set the
polarity to active high and hardwire the pin to ground
with a 10 k resistor.
Table 44. Auto Power-Down Select
Power-Down Select
Result
0
Manual power-down control
(User determines power-down)
1
Auto power-down control
(Chip determines power-down)
0x1E
3
Power-Down
This bit is used to manually place the chip in power-
down mode. It is only used if manual power-down
control is selected (see Bit 4 above). Both the state of
this register bit and the power-down pin (Pin 17)
are used to control manual power-down. (See the
Power Management section for more details on
power-down.)
Table 45. Power-Down Settings
Power-Down Select
Pin 17
0
0
1
X
Result
Normal operation
Power-down
0x1E
2
Power-Down Polarity
This bit defines the polarity of the power-down pin
(Pin 17). It is only used if manual power-down control
is selected (see Bit 4 above).
Table 46. Power-Down Pin Polarity
Select
Result
0
Power-down pin is active low
1
Power-down pin is active high
0x1E
1
Power-Down Fast Switching Control
This bit controls a special fast switching mode. With
this bit the AD9981 can stay active during power-
down and only put the outputs in high impedance.
This option is useful when the data outputs from two
chips are connected on a PCB and the user wants to
switch instantaneously between the two.
Table 47. Power-Down Fast Switching Control
Fast Switching Control
Result
0
Normal power-down operation
1
The chip stays powered up and the
outputs are put in high impedance
mode
0x1E
0
SOGOUT High Impedance Control
This bit controls whether the SOGOUT output pin is
in high impedance or not, when in power-down mode.
In most cases, SOGOUT is not put in high impedance
during normal operation. It is usually needed for sync
detection by the graphics controller. The option to put
SOGOUT in high impedance is included mainly to
allow for factory testing modes.
Table 42. SOGOUT High Impedance Control
SOGOUT Control
Result
0
The SOGOUT output operates as
normal during power-down.
1
The SOGOUT output is in high
impedance during power-down.
OUTPUT CONTROL
0x1F
7:5
Output Mode
These bits choose between three options for the
output mode. In 4:4:4 mode, RGB is standard. In 4:2:2
mode, YCbCr is standard, which allows a reduction in
the number of output pins from 30 to 20. In 4:4:4
DDR output mode, the data is in RGB mode, but
changes on every clock edge. The power-up default
setting is 100.
Table 43. Output Mode
Output Mode
Result
100
4:4:4 RGB mode
101
4:2:2 YCbCr mode
110
4:4:4 DDR mode
0x1F
4
Primary Output Enable
This bit places the primary output in active or high
impedance mode. The power-up default setting is 1.
Table 44. Primary Output Enable
Select
Result
0
Primary output is in high impedance
mode
1
Primary output is enabled
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